Lines Matching defs:val
97 static void iommu_write_regl(loongson_iommu *iommu, unsigned long off, u32 val)
99 *(u32 *)(iommu->membase + off) = val;
105 u32 val;
107 val = *(u32 *)(iommu->membase + off);
109 return val;
114 u32 val;
121 val = iommu_read_regl(iommu, LA_IOMMU_EIVDB);
124 val &= ~(1 << 31);
125 iommu_write_regl(iommu, LA_IOMMU_EIVDB, val);
128 val = iommu_read_regl(iommu, LA_IOMMU_CMD);
129 val &= 0xfffffffc;
130 iommu_write_regl(iommu, LA_IOMMU_CMD, val);
135 u32 val = 0;
142 val = iommu_read_regl(iommu, LA_IOMMU_EIVDB);
145 val |= (1 << 31);
146 iommu_write_regl(iommu, LA_IOMMU_EIVDB, val);
149 val = iommu_read_regl(iommu, LA_IOMMU_CMD);
150 val &= 0xfffffffc;
151 iommu_write_regl(iommu, LA_IOMMU_CMD, val);
187 u32 val = 0;
228 val = bdf & 0xffff;
229 val |= ((domain_id & 0xf) << 16); /* domain id */
230 val |= ((index & 0xf) << 24); /* index */
231 val |= (0x1 << 20); /* valid */
232 val |= (0x1 << 31); /* enable */
233 iommu_write_regl(iommu, LA_IOMMU_EIVDB, val);
235 val = iommu_read_regl(iommu, LA_IOMMU_CMD);
236 val &= 0xfffffffc;
237 iommu_write_regl(iommu, LA_IOMMU_CMD, val);
246 val = iommu_read_regl(iommu, LA_IOMMU_EIVDB);
247 val &= ~(0x7fffffff);
248 val |= ((index & 0xf) << 24); /* index */
249 iommu_write_regl(iommu, LA_IOMMU_EIVDB, val);
251 val = iommu_read_regl(iommu, LA_IOMMU_CMD);
252 val &= 0xfffffffc;
253 iommu_write_regl(iommu, LA_IOMMU_CMD, val);
264 u32 val, cmd;
271 val = iommu_read_regl(iommu, LA_IOMMU_VBTC);
272 val &= ~0x1f;
275 val |= 0x5;
276 iommu_write_regl(iommu, LA_IOMMU_VBTC, val);
285 u32 val;
292 val = iommu_read_regl(iommu, LA_IOMMU_VBTC);
294 return val & IOMMU_PGTABLE_BUSY;