Lines Matching defs:agaw
106 static inline int agaw_to_level(int agaw)
108 return agaw + 2;
111 static inline int agaw_to_width(int agaw)
113 return min_t(int, 30 + agaw * LEVEL_STRIDE, MAX_AGAW_WIDTH);
558 int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
589 int agaw = -1;
592 for (agaw = width_to_agaw(max_gaw); agaw >= 0; agaw--) {
593 if (test_bit(agaw, &sagaw))
597 return agaw;
609 * calculate agaw for each iommu.
610 * "SAGAW" may be different across iommus, use a default agaw, and
611 * get a supported less agaw for iommus that don't support the default agaw.
1022 int level = agaw_to_level(domain->agaw);
1083 int total = agaw_to_level(domain->agaw);
1196 dma_pte_free_level(domain, agaw_to_level(domain->agaw), retain_level,
1299 freelist = dma_pte_clear_level(domain, agaw_to_level(domain->agaw),
2059 int agaw;
2063 agaw = gaw;
2065 agaw = gaw + 9 - r;
2066 if (agaw > 64)
2067 agaw = 64;
2068 return agaw;
2222 int agaw;
2229 * less agaw than default. Unnecessary for PT mode.
2231 for (agaw = domain->agaw; agaw > iommu->agaw; agaw--) {
2245 context_set_address_width(context, agaw);
2653 int agaw, level;
2658 * less agaw than default. Unnecessary for PT mode.
2660 for (agaw = domain->agaw; agaw > iommu->agaw; agaw--) {
2666 level = agaw_to_level(agaw);
2880 end >> agaw_to_width(si_domain->agaw)))
3821 agaw_to_level(domain->agaw) + 1);
5183 domain->agaw = width_to_agaw(adjust_width);
5393 /* check if this iommu agaw is sufficient for max mapped address */
5394 addr_width = agaw_to_width(iommu->agaw);
5409 while (iommu->agaw < dmar_domain->agaw) {
5418 dmar_domain->agaw--;
5680 /* check if minimum agaw is sufficient for mapped address */