Lines Matching defs:iommu
13 #include <linux/intel-iommu.h>
113 struct intel_iommu *iommu;
119 for_each_active_iommu(iommu, drhd) {
127 iommu->name, drhd->reg_base_addr);
133 raw_spin_lock_irqsave(&iommu->register_lock, flag);
135 value = dmar_readl(iommu->reg + iommu_regs_32[i].offset);
141 value = dmar_readq(iommu->reg + iommu_regs_64[i].offset);
146 raw_spin_unlock_irqrestore(&iommu->register_lock, flag);
214 static void ctx_tbl_walk(struct seq_file *m, struct intel_iommu *iommu, u16 bus)
236 context = iommu_context_addr(iommu, bus, devfn, 0);
245 tbl_wlk.rt_entry = &iommu->root_entry[bus];
249 if (dmar_readq(iommu->reg + DMAR_RTADDR_REG) & DMA_RTADDR_SMT) {
260 static void root_tbl_walk(struct seq_file *m, struct intel_iommu *iommu)
265 spin_lock_irqsave(&iommu->lock, flags);
266 seq_printf(m, "IOMMU %s: Root Table Address: 0x%llx\n", iommu->name,
267 (u64)virt_to_phys(iommu->root_entry));
276 ctx_tbl_walk(m, iommu, bus);
278 spin_unlock_irqrestore(&iommu->lock, flags);
284 struct intel_iommu *iommu;
288 for_each_active_iommu(iommu, drhd) {
289 sts = dmar_readl(iommu->reg + DMAR_GSTS_REG);
292 iommu->name);
295 root_tbl_walk(m, iommu);
376 struct intel_iommu *iommu)
378 int index, shift = qi_shift(iommu);
382 if (ecap_smts(iommu->ecap))
389 desc = iommu->qi->desc + offset;
390 if (ecap_smts(iommu->ecap))
394 iommu->qi->desc_status[index]);
398 iommu->qi->desc_status[index]);
405 struct intel_iommu *iommu;
411 for_each_active_iommu(iommu, drhd) {
412 qi = iommu->qi;
413 shift = qi_shift(iommu);
415 if (!qi || !ecap_qis(iommu->ecap))
418 seq_printf(m, "Invalidation queue on IOMMU: %s\n", iommu->name);
423 dmar_readq(iommu->reg + DMAR_IQH_REG) >> shift,
424 dmar_readq(iommu->reg + DMAR_IQT_REG) >> shift);
425 invalidation_queue_entry_show(m, iommu);
437 struct intel_iommu *iommu)
447 ri_entry = &iommu->ir_table->base[idx];
461 struct intel_iommu *iommu)
471 pi_entry = &iommu->ir_table->base[idx];
493 struct intel_iommu *iommu;
498 for_each_active_iommu(iommu, drhd) {
499 if (!ecap_ir_support(iommu->ecap))
503 iommu->name);
505 sts = dmar_readl(iommu->reg + DMAR_GSTS_REG);
506 if (iommu->ir_table && (sts & DMA_GSTS_IRES)) {
507 irta = virt_to_phys(iommu->ir_table->base);
509 ir_tbl_remap_entry_show(m, iommu);
518 for_each_active_iommu(iommu, drhd) {
519 if (!cap_pi_support(iommu->cap))
523 iommu->name);
525 if (iommu->ir_table) {
526 irta = virt_to_phys(iommu->ir_table->base);
528 ir_tbl_posted_entry_show(m, iommu);