Lines Matching defs:master
913 struct arm_smmu_master *master;
925 list_for_each_entry(master, &smmu_domain->devices, domain_head) {
926 for (i = 0; i < master->num_sids; i++) {
927 cmd.cfgi.sid = master->sids[i];
1188 static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
1220 if (master) {
1221 smmu_domain = master->domain;
1222 smmu = master->smmu;
1313 if (master->ats_enabled)
1575 static int arm_smmu_atc_inv_master(struct arm_smmu_master *master)
1582 for (i = 0; i < master->num_sids; i++) {
1583 cmd.atc.sid = master->sids[i];
1584 arm_smmu_cmdq_issue_cmd(master->smmu, &cmd);
1587 return arm_smmu_cmdq_issue_sync(master->smmu);
1596 struct arm_smmu_master *master;
1622 list_for_each_entry(master, &smmu_domain->devices, domain_head) {
1623 if (!master->ats_enabled)
1626 for (i = 0; i < master->num_sids; i++) {
1627 cmd.atc.sid = master->sids[i];
1792 * master.
1857 struct arm_smmu_master *master,
1875 cfg->s1cdmax = master->ssid_bits;
1894 * the master has been added to the devices list for this domain.
1914 struct arm_smmu_master *master,
1940 struct arm_smmu_master *master)
2003 ret = finalise_stage_fn(smmu_domain, master, &pgtbl_cfg);
2035 static void arm_smmu_install_ste_for_dev(struct arm_smmu_master *master)
2038 struct arm_smmu_device *smmu = master->smmu;
2040 for (i = 0; i < master->num_sids; ++i) {
2041 u32 sid = master->sids[i];
2046 if (master->sids[j] == sid)
2051 arm_smmu_write_strtab_ent(master, sid, step);
2055 static bool arm_smmu_ats_supported(struct arm_smmu_master *master)
2057 struct device *dev = master->dev;
2058 struct arm_smmu_device *smmu = master->smmu;
2070 static void arm_smmu_enable_ats(struct arm_smmu_master *master)
2074 struct arm_smmu_device *smmu = master->smmu;
2075 struct arm_smmu_domain *smmu_domain = master->domain;
2078 if (!master->ats_enabled)
2083 pdev = to_pci_dev(master->dev);
2088 dev_err(master->dev, "Failed to enable ATS (STU %zu)\n", stu);
2091 static void arm_smmu_disable_ats(struct arm_smmu_master *master)
2093 struct arm_smmu_domain *smmu_domain = master->domain;
2095 if (!master->ats_enabled)
2098 pci_disable_ats(to_pci_dev(master->dev));
2104 arm_smmu_atc_inv_master(master);
2108 static int arm_smmu_enable_pasid(struct arm_smmu_master *master)
2115 if (!dev_is_pci(master->dev))
2118 pdev = to_pci_dev(master->dev);
2134 master->ssid_bits = min_t(u8, ilog2(num_pasids),
2135 master->smmu->ssid_bits);
2139 static void arm_smmu_disable_pasid(struct arm_smmu_master *master)
2143 if (!dev_is_pci(master->dev))
2146 pdev = to_pci_dev(master->dev);
2151 master->ssid_bits = 0;
2155 static void arm_smmu_detach_dev(struct arm_smmu_master *master)
2158 struct arm_smmu_domain *smmu_domain = master->domain;
2163 arm_smmu_disable_ats(master);
2166 list_del(&master->domain_head);
2169 master->domain = NULL;
2170 master->ats_enabled = false;
2171 arm_smmu_install_ste_for_dev(master);
2181 struct arm_smmu_master *master;
2186 master = dev_iommu_priv_get(dev);
2187 smmu = master->smmu;
2194 if (arm_smmu_master_sva_enabled(master)) {
2199 arm_smmu_detach_dev(master);
2205 ret = arm_smmu_domain_finalise(domain, master);
2218 master->ssid_bits != smmu_domain->s1_cfg.s1cdmax) {
2221 smmu_domain->s1_cfg.s1cdmax, master->ssid_bits);
2226 master->domain = smmu_domain;
2229 master->ats_enabled = arm_smmu_ats_supported(master);
2231 arm_smmu_install_ste_for_dev(master);
2234 list_add(&master->domain_head, &smmu_domain->devices);
2237 arm_smmu_enable_ats(master);
2325 struct arm_smmu_master *master;
2338 master = kzalloc(sizeof(*master), GFP_KERNEL);
2339 if (!master)
2342 master->dev = dev;
2343 master->smmu = smmu;
2344 master->sids = fwspec->ids;
2345 master->num_sids = fwspec->num_ids;
2346 INIT_LIST_HEAD(&master->bonds);
2347 dev_iommu_priv_set(dev, master);
2350 for (i = 0; i < master->num_sids; i++) {
2351 u32 sid = master->sids[i];
2366 master->ssid_bits = min(smmu->ssid_bits, fwspec->num_pasid_bits);
2376 arm_smmu_enable_pasid(master);
2379 master->ssid_bits = min_t(u8, master->ssid_bits,
2385 kfree(master);
2393 struct arm_smmu_master *master;
2398 master = dev_iommu_priv_get(dev);
2399 WARN_ON(arm_smmu_master_sva_enabled(master));
2400 arm_smmu_detach_dev(master);
2401 arm_smmu_disable_pasid(master);
2402 kfree(master);
2520 struct arm_smmu_master *master = dev_iommu_priv_get(dev);
2522 if (!master)
2527 return arm_smmu_master_sva_supported(master);
2536 struct arm_smmu_master *master = dev_iommu_priv_get(dev);
2538 if (!master)
2543 return arm_smmu_master_sva_enabled(master);