Lines Matching defs:cons
116 u32 space, prod, cons;
119 cons = Q_IDX(q, q->cons);
121 if (Q_WRP(q, q->prod) == Q_WRP(q, q->cons))
122 space = (1 << q->max_n_shift) - (prod - cons);
124 space = cons - prod;
131 return Q_IDX(q, q->prod) == Q_IDX(q, q->cons) &&
132 Q_WRP(q, q->prod) != Q_WRP(q, q->cons);
137 return Q_IDX(q, q->prod) == Q_IDX(q, q->cons) &&
138 Q_WRP(q, q->prod) == Q_WRP(q, q->cons);
143 return ((Q_WRP(q, q->cons) == Q_WRP(q, prod)) &&
144 (Q_IDX(q, q->cons) > Q_IDX(q, prod))) ||
145 ((Q_WRP(q, q->cons) != Q_WRP(q, prod)) &&
146 (Q_IDX(q, q->cons) <= Q_IDX(q, prod)));
153 * are complete before we update the cons pointer.
156 writel_relaxed(q->llq.cons, q->cons_reg);
161 u32 cons = (Q_WRP(q, q->cons) | Q_IDX(q, q->cons)) + 1;
162 q->cons = Q_OVF(q->cons) | Q_WRP(q, cons) | Q_IDX(q, cons);
169 if (likely(Q_OVF(llq->prod) == Q_OVF(llq->cons)))
172 llq->cons = Q_OVF(llq->prod) | Q_WRP(llq, llq->cons) |
173 Q_IDX(llq, llq->cons);
250 queue_read(ent, Q_ENT(q, q->llq.cons), q->ent_dwords);
382 u32 cons = readl_relaxed(q->cons_reg);
383 u32 idx = FIELD_GET(CMDQ_CONS_ERR, cons);
388 dev_err(smmu->dev, "CMDQ error (cons 0x%08x): %s\n", cons,
413 queue_read(cmd, Q_ENT(q, cons), q->ent_dwords);
424 queue_write(Q_ENT(q, cons), cmd, q->ent_dwords);
520 * b. Otherwise, we spin waiting for the hardware cons pointer to
597 * Try to update our copy of cons by grabbing exclusive cmdq access. If
601 WRITE_ONCE(cmdq->q.llq.cons, readl_relaxed(cmdq->q.cons_reg));
639 llq->cons = ret ? llq->prod : queue_inc_prod_n(llq, 1);
644 * Wait until the SMMU cons index passes llq->prod.
671 * cmdq->q.llq.cons. Roughly speaking:
691 llq->cons = readl(cmdq->q.cons_reg);
765 head.cons = llq.cons;
847 * reader, in which case we can safely update cmdq->q.llq.cons
850 WRITE_ONCE(cmdq->q.llq.cons, llq.cons);
2644 q->llq.prod = q->llq.cons = 0;
3069 writel_relaxed(smmu->cmdq.q.llq.cons, smmu->base + ARM_SMMU_CMDQ_CONS);
3098 writel_relaxed(smmu->evtq.q.llq.cons,
3115 writel_relaxed(smmu->priq.q.llq.cons,