Lines Matching defs:pgtable
103 struct domain_pgtable *pgtable);
156 struct domain_pgtable *pgtable)
160 pgtable->root = (u64 *)(pt_root & PAGE_MASK);
161 pgtable->mode = pt_root & 7; /* lowest 3 bits encode pgtable mode */
179 /* lowest 3 bits encode pgtable mode */
1482 static void free_pagetable(struct domain_pgtable *pgtable)
1487 if (pgtable->mode == PAGE_MODE_NONE)
1490 BUG_ON(pgtable->mode < PAGE_MODE_NONE ||
1491 pgtable->mode > PAGE_MODE_6_LEVEL);
1493 root = (unsigned long)pgtable->root;
1494 freelist = free_sub_pt(root, pgtable->mode, freelist);
1508 struct domain_pgtable pgtable;
1519 amd_iommu_domain_get_pgtable(domain, &pgtable);
1521 if (address <= PM_LEVEL_SIZE(pgtable.mode))
1525 if (WARN_ON_ONCE(pgtable.mode == PAGE_MODE_6_LEVEL))
1528 *pte = PM_LEVEL_PDE(pgtable.mode, iommu_virt_to_phys(pgtable.root));
1530 pgtable.root = pte;
1531 pgtable.mode += 1;
1532 update_and_flush_device_table(domain, &pgtable);
1539 amd_iommu_domain_set_pgtable(domain, pte, pgtable.mode);
1558 struct domain_pgtable pgtable;
1564 amd_iommu_domain_get_pgtable(domain, &pgtable);
1566 while (address > PM_LEVEL_SIZE(pgtable.mode)) {
1575 amd_iommu_domain_get_pgtable(domain, &pgtable);
1579 level = pgtable.mode - 1;
1580 pte = &pgtable.root[PM_LEVEL_INDEX(level, address)];
1656 struct domain_pgtable pgtable;
1662 amd_iommu_domain_get_pgtable(domain, &pgtable);
1664 if (address > PM_LEVEL_SIZE(pgtable.mode))
1667 level = pgtable.mode - 1;
1668 pte = &pgtable.root[PM_LEVEL_INDEX(level, address)];
1909 struct domain_pgtable *pgtable,
1916 if (pgtable->mode != PAGE_MODE_NONE)
1917 pte_root = iommu_virt_to_phys(pgtable->root);
1919 pte_root |= (pgtable->mode & DEV_ENTRY_MODE_MASK)
1992 struct domain_pgtable pgtable;
2008 amd_iommu_domain_get_pgtable(domain, &pgtable);
2009 set_dte_entry(dev_data->devid, domain, &pgtable,
2317 struct domain_pgtable *pgtable)
2322 set_dte_entry(dev_data->devid, domain, pgtable,
2329 struct domain_pgtable *pgtable)
2331 update_device_table(domain, pgtable);
2337 struct domain_pgtable pgtable;
2340 amd_iommu_domain_get_pgtable(domain, &pgtable);
2341 update_and_flush_device_table(domain, &pgtable);
2413 struct domain_pgtable pgtable;
2421 amd_iommu_domain_get_pgtable(domain, &pgtable);
2423 free_pagetable(&pgtable);
2593 struct domain_pgtable pgtable;
2597 amd_iommu_domain_get_pgtable(domain, &pgtable);
2598 if (pgtable.mode == PAGE_MODE_NONE)
2618 struct domain_pgtable pgtable;
2620 amd_iommu_domain_get_pgtable(domain, &pgtable);
2621 if (pgtable.mode == PAGE_MODE_NONE)
2632 struct domain_pgtable pgtable;
2635 amd_iommu_domain_get_pgtable(domain, &pgtable);
2636 if (pgtable.mode == PAGE_MODE_NONE)
2812 struct domain_pgtable pgtable;
2817 /* First save pgtable configuration*/
2818 amd_iommu_domain_get_pgtable(domain, &pgtable);
2827 free_pagetable(&pgtable);
3016 struct domain_pgtable pgtable;
3019 amd_iommu_domain_get_pgtable(domain, &pgtable);
3020 if (pgtable.mode != PAGE_MODE_NONE)
3034 struct domain_pgtable pgtable;
3037 amd_iommu_domain_get_pgtable(domain, &pgtable);
3038 if (pgtable.mode != PAGE_MODE_NONE)