Lines Matching refs:ret
309 bool ret = false;
313 ret = iommu_feature(iommu, mask);
314 if (!ret)
629 int ret = find_last_devid_from_ivhd(h);
631 if (ret)
632 return ret;
1156 int i, ret;
1159 ret = add_special_device(IVHD_SPECIAL_IOAPIC,
1163 if (ret)
1164 return ret;
1168 ret = add_special_device(IVHD_SPECIAL_HPET,
1172 if (ret)
1173 return ret;
1177 ret = add_acpi_hid_device(early_acpihid_map[i].hid,
1181 if (ret)
1182 return ret;
1202 int ret;
1205 ret = add_early_maps();
1206 if (ret)
1207 return ret;
1352 int ret;
1371 ret = add_special_device(type, handle, &devid, false);
1372 if (ret)
1373 return ret;
1388 int ret;
1436 ret = add_acpi_hid_device(hid, uid, &devid, false);
1437 if (ret)
1438 return ret;
1545 int ret;
1650 ret = init_iommu_from_acpi(iommu, h);
1651 if (ret)
1652 return ret;
1654 ret = amd_iommu_create_irq_domain(iommu);
1655 if (ret)
1656 return ret;
1702 int ret;
1723 ret = init_iommu_one(iommu, h);
1724 if (ret)
1725 return ret;
1820 int ret;
1869 ret = iommu_init_ga_log(iommu);
1870 if (ret)
1871 return ret;
1957 int ret = 0;
1960 ret = iommu_init_pci(iommu);
1961 if (ret)
1978 ret = amd_iommu_init_api();
1985 if (!ret)
1988 return ret;
2079 int ret;
2096 ret = irq_set_affinity_notifier(iommu->dev->irq, notify);
2097 if (ret) {
2100 return ret;
2105 return ret;
2110 int ret;
2116 ret = iommu_setup_msi(iommu);
2118 ret = -ENODEV;
2120 if (ret)
2121 return ret;
2124 ret = iommu_init_intcapxt(iommu);
2125 if (ret)
2126 return ret;
2519 bool ret, has_sb_ioapic;
2523 ret = false;
2540 ret = false;
2543 ret = true;
2559 if (!ret)
2562 return ret;
2610 int i, remap_cache_sz, ret = 0;
2629 ret = check_ivrs_checksum(ivrs_base);
2630 if (ret)
2643 ret = find_last_devid_acpi(ivrs_base);
2644 if (ret)
2652 ret = -ENOMEM;
2697 ret = init_iommu_all(ivrs_base);
2698 if (ret)
2723 ret = -ENOMEM;
2744 ret = init_memory_definitions(ivrs_base);
2745 if (ret)
2756 return ret;
2762 int ret = 0;
2765 ret = iommu_init_msi(iommu);
2766 if (ret)
2771 return ret;
2804 int ret = 0;
2810 ret = -ENODEV;
2816 ret = early_amd_iommu_init();
2817 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_ACPI_FINISHED;
2821 ret = -EINVAL;
2831 ret = amd_iommu_init_pci();
2832 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_PCI_INIT;
2836 ret = amd_iommu_enable_interrupts();
2837 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_INTERRUPTS_EN;
2840 ret = amd_iommu_init_dma_ops();
2841 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_DMA_OPS;
2853 ret = -EINVAL;
2860 if (ret) {
2873 return ret;
2878 int ret = -EINVAL;
2885 ret = state_next();
2888 return ret;
2894 int ret;
2898 ret = iommu_go_to_state(IOMMU_ACPI_FINISHED);
2899 if (ret)
2900 return ret;
2906 int ret;
2908 ret = iommu_go_to_state(IOMMU_ENABLED);
2909 if (ret)
2910 return ret;
2943 int ret;
2945 ret = iommu_go_to_state(IOMMU_INITIALIZED);
2947 if (ret && list_empty(&amd_iommu_list)) {
2959 return ret;
2989 int ret;
2997 ret = iommu_go_to_state(IOMMU_IVRS_DETECTED);
2998 if (ret)
2999 return ret;