Lines Matching refs:reg_addr
127 struct edt_reg_addr reg_addr;
542 struct edt_reg_addr *reg_addr = &tsdata->reg_addr;
544 edt_ft5x06_register_write(tsdata, reg_addr->reg_threshold,
546 edt_ft5x06_register_write(tsdata, reg_addr->reg_gain,
548 if (reg_addr->reg_offset != NO_REGISTER)
549 edt_ft5x06_register_write(tsdata, reg_addr->reg_offset,
551 if (reg_addr->reg_offset_x != NO_REGISTER)
552 edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_x,
554 if (reg_addr->reg_offset_y != NO_REGISTER)
555 edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_y,
557 if (reg_addr->reg_report_rate != NO_REGISTER)
558 edt_ft5x06_register_write(tsdata, reg_addr->reg_report_rate,
939 struct edt_reg_addr *reg_addr = &tsdata->reg_addr;
945 edt_ft5x06_register_write(tsdata, reg_addr->reg_threshold, val);
951 edt_ft5x06_register_write(tsdata, reg_addr->reg_gain, val);
957 if (reg_addr->reg_offset != NO_REGISTER)
959 reg_addr->reg_offset, val);
965 if (reg_addr->reg_offset_x != NO_REGISTER)
967 reg_addr->reg_offset_x, val);
973 if (reg_addr->reg_offset_y != NO_REGISTER)
975 reg_addr->reg_offset_y, val);
983 struct edt_reg_addr *reg_addr = &tsdata->reg_addr;
986 reg_addr->reg_threshold);
987 tsdata->gain = edt_ft5x06_register_read(tsdata, reg_addr->reg_gain);
988 if (reg_addr->reg_offset != NO_REGISTER)
990 edt_ft5x06_register_read(tsdata, reg_addr->reg_offset);
991 if (reg_addr->reg_offset_x != NO_REGISTER)
993 reg_addr->reg_offset_x);
994 if (reg_addr->reg_offset_y != NO_REGISTER)
996 reg_addr->reg_offset_y);
997 if (reg_addr->reg_report_rate != NO_REGISTER)
999 reg_addr->reg_report_rate);
1004 reg_addr->reg_num_x);
1006 reg_addr->reg_num_y);
1016 struct edt_reg_addr *reg_addr = &tsdata->reg_addr;
1020 reg_addr->reg_threshold = WORK_REGISTER_THRESHOLD;
1021 reg_addr->reg_report_rate = WORK_REGISTER_REPORT_RATE;
1022 reg_addr->reg_gain = WORK_REGISTER_GAIN;
1023 reg_addr->reg_offset = WORK_REGISTER_OFFSET;
1024 reg_addr->reg_offset_x = NO_REGISTER;
1025 reg_addr->reg_offset_y = NO_REGISTER;
1026 reg_addr->reg_num_x = WORK_REGISTER_NUM_X;
1027 reg_addr->reg_num_y = WORK_REGISTER_NUM_Y;
1032 reg_addr->reg_threshold = M09_REGISTER_THRESHOLD;
1033 reg_addr->reg_report_rate = NO_REGISTER;
1034 reg_addr->reg_gain = M09_REGISTER_GAIN;
1035 reg_addr->reg_offset = M09_REGISTER_OFFSET;
1036 reg_addr->reg_offset_x = NO_REGISTER;
1037 reg_addr->reg_offset_y = NO_REGISTER;
1038 reg_addr->reg_num_x = M09_REGISTER_NUM_X;
1039 reg_addr->reg_num_y = M09_REGISTER_NUM_Y;
1043 reg_addr->reg_threshold = EV_REGISTER_THRESHOLD;
1044 reg_addr->reg_gain = EV_REGISTER_GAIN;
1045 reg_addr->reg_offset = NO_REGISTER;
1046 reg_addr->reg_offset_x = EV_REGISTER_OFFSET_X;
1047 reg_addr->reg_offset_y = EV_REGISTER_OFFSET_Y;
1048 reg_addr->reg_num_x = NO_REGISTER;
1049 reg_addr->reg_num_y = NO_REGISTER;
1050 reg_addr->reg_report_rate = NO_REGISTER;
1055 reg_addr->reg_threshold = M09_REGISTER_THRESHOLD;
1056 reg_addr->reg_gain = M09_REGISTER_GAIN;
1057 reg_addr->reg_offset = M09_REGISTER_OFFSET;
1058 reg_addr->reg_offset_x = NO_REGISTER;
1059 reg_addr->reg_offset_y = NO_REGISTER;