Lines Matching defs:enable
232 u64 extctrl; /* shadow the gpio output enable, etc... */
677 /* enable/disable chip from delivering interrupts */
678 static void qib_6120_set_intr_state(struct qib_devdata *dd, u32 enable)
680 if (enable) {
725 * and cancelling sends. Re-enable error interrupts before possible
1119 * qib_6120_init_hwerrors - enable hardware errors
1124 * we can enable hardware errors in the mask (potentially enabling
1125 * freeze mode), and enable hardware errors as errors (along with
1157 /* enable errors that are masked, at least this first time. */
1169 * Disable and enable the armlaunch error. Used for PIO bandwidth testing
1174 static void qib_set_6120_armlaunch(struct qib_devdata *dd, u32 enable)
1176 if (enable) {
1272 * Force reset on, also set rxdetect enable. Must do before reading
1384 /* enable counter writes */
1692 * enable interrupts on those bits so the interrupt routine
2145 * already from the enable, but since we don't
2729 case QIB_IB_CFG_HRTBT: /* Get Heartbeat off/enable/auto */