Lines Matching defs:order
129 return ((u64)1 << mr->order) * MLX5_ADAPTER_PAGE_SIZE >=
175 mr->order = ent->order;
506 "command failed order %d, err %d\n",
507 ent->order, err);
525 * order to free CPU resources to other tasks.
606 mlx5_ib_dbg(dev, "order %u, cache index %zu\n", ent->order,
712 sprintf(ent->name, "%d", ent->order);
747 ent->order = i + 2;
759 if (ent->order > mr_cache_max_order(dev))
763 ent->xlt = (1 << ent->order) * sizeof(struct mlx5_mtt) /
877 int *page_shift, int *ncont, int *order)
899 if (order)
900 *order = ilog2(roundup_pow_of_two(*ncont));
909 page_shift, ncont, order);
920 mlx5_ib_dbg(dev, "npages %d, ncont %d, order %d, page_shift %d\n",
921 *npages, *ncont, *order, *page_shift);
970 unsigned int order)
974 if (order < cache->ent[0].order)
976 order = order - cache->ent[0].order;
977 if (order > MR_CACHE_LAST_STD_ENTRY)
979 return &cache->ent[order];
984 u64 len, int npages, int page_shift, unsigned int order,
988 struct mlx5_cache_ent *ent = mr_cache_ent_from_order(dev, order);
1064 mlx5_ib_dbg(dev, "Failed to allocate %d bytes of order %d. fallback to spare UMR allocation od %d bytes\n",
1368 int order;
1397 &npages, &page_shift, &ncont, &order);
1404 page_shift, order, access_flags);
1531 int order = 0;
1564 &npages, &page_shift, &ncont, &order);
2300 * In order to use one MTT MR for data and metadata, we register