Lines Matching defs:cqe64
82 struct mlx5_cqe64 *cqe64;
84 cqe64 = (cq->mcq.cqe_sz == 64) ? cqe : cqe + 64;
86 if (likely(get_cqe_opcode(cqe64) != MLX5_CQE_INVALID) &&
87 !((cqe64->op_own & MLX5_CQE_OWNER_MASK) ^ !!(n & (cq->ibcq.cqe + 1)))) {
335 static void handle_atomics(struct mlx5_ib_qp *qp, struct mlx5_cqe64 *cqe64,
447 struct mlx5_cqe64 *cqe64;
461 cqe64 = (cq->mcq.cqe_sz == 64) ? cqe : cqe + 64;
470 opcode = get_cqe_opcode(cqe64);
483 qpn = ntohl(cqe64->sop_drop_qpn) & 0xffffff;
497 wqe_ctr = be16_to_cpu(cqe64->wqe_counter);
499 handle_good_req(wc, cqe64, wq, idx);
500 handle_atomics(*cur_qp, cqe64, wq->last_poll, idx);
509 handle_responder(wc, cqe64, *cur_qp);
516 err_cqe = (struct mlx5_err_cqe *)cqe64;
525 wqe_ctr = be16_to_cpu(cqe64->wqe_counter);
534 wqe_ctr = be16_to_cpu(cqe64->wqe_counter);
546 (struct mlx5_sig_err_cqe *)cqe64;
845 struct mlx5_cqe64 *cqe64;
849 cqe64 = buf->cqe_size == 64 ? cqe : cqe + 64;
850 cqe64->op_own = MLX5_CQE_INVALID << 4;
1041 static int is_equal_rsn(struct mlx5_cqe64 *cqe64, u32 rsn)
1043 return rsn == (ntohl(cqe64->sop_drop_qpn) & 0xffffff);
1048 struct mlx5_cqe64 *cqe64, *dest64;
1072 cqe64 = (cq->mcq.cqe_sz == 64) ? cqe : cqe + 64;
1073 if (is_equal_rsn(cqe64, rsn)) {
1074 if (srq && (ntohl(cqe64->srqn) & 0xffffff))
1075 mlx5_ib_free_srq_wqe(srq, be16_to_cpu(cqe64->wqe_counter));