Lines Matching defs:info
242 * @info: post sq information
246 struct i40iw_post_sq_info *info,
258 op_info = &info->op.rdma_write;
268 read_fence |= info->read_fence;
274 wqe = i40iw_qp_get_next_send_wqe(qp, &wqe_idx, wqe_size, total_size, info->wr_id);
286 LS_64(info->local_fence, I40IWQPSQ_LOCALFENCE) |
287 LS_64(info->signaled, I40IWQPSQ_SIGCOMPL) |
310 * @info: post sq information
315 struct i40iw_post_sq_info *info,
327 op_info = &info->op.rdma_read;
331 wqe = i40iw_qp_get_next_send_wqe(qp, &wqe_idx, wqe_size, op_info->lo_addr.len, info->wr_id);
334 local_fence |= info->local_fence;
339 LS_64(info->read_fence, I40IWQPSQ_READFENCE) |
341 LS_64(info->signaled, I40IWQPSQ_SIGCOMPL) |
358 * @info: post sq information
363 struct i40iw_post_sq_info *info,
375 op_info = &info->op.send;
385 wqe = i40iw_qp_get_next_send_wqe(qp, &wqe_idx, wqe_size, total_size, info->wr_id);
389 read_fence |= info->read_fence;
392 LS_64(info->op_type, I40IWQPSQ_OPCODE) |
396 LS_64(info->local_fence, I40IWQPSQ_LOCALFENCE) |
397 LS_64(info->signaled, I40IWQPSQ_SIGCOMPL) |
419 * @info: post sq information
423 struct i40iw_post_sq_info *info,
436 op_info = &info->op.inline_rdma_write;
444 wqe = i40iw_qp_get_next_send_wqe(qp, &wqe_idx, wqe_size, op_info->len, info->wr_id);
448 read_fence |= info->read_fence;
458 LS_64(info->local_fence, I40IWQPSQ_LOCALFENCE) |
459 LS_64(info->signaled, I40IWQPSQ_SIGCOMPL) |
493 * @info: post sq information
498 struct i40iw_post_sq_info *info,
512 op_info = &info->op.inline_send;
520 wqe = i40iw_qp_get_next_send_wqe(qp, &wqe_idx, wqe_size, op_info->len, info->wr_id);
524 read_fence |= info->read_fence;
526 LS_64(info->op_type, I40IWQPSQ_OPCODE) |
531 LS_64(info->local_fence, I40IWQPSQ_LOCALFENCE) |
532 LS_64(info->signaled, I40IWQPSQ_SIGCOMPL) |
566 * @info: post sq information
570 struct i40iw_post_sq_info *info,
579 op_info = &info->op.inv_local_stag;
580 local_fence = info->local_fence;
582 wqe = i40iw_qp_get_next_send_wqe(qp, &wqe_idx, I40IW_QP_WQE_MIN_SIZE, 0, info->wr_id);
590 LS_64(info->read_fence, I40IWQPSQ_READFENCE) |
592 LS_64(info->signaled, I40IWQPSQ_SIGCOMPL) |
608 * @info: post sq information
612 struct i40iw_post_sq_info *info,
621 op_info = &info->op.bind_window;
623 local_fence |= info->local_fence;
624 wqe = i40iw_qp_get_next_send_wqe(qp, &wqe_idx, I40IW_QP_WQE_MIN_SIZE, 0, info->wr_id);
638 LS_64(info->read_fence, I40IWQPSQ_READFENCE) |
640 LS_64(info->signaled, I40IWQPSQ_SIGCOMPL) |
656 * @info: post rq information
659 struct i40iw_post_rq_info *info)
665 if (qp->max_rq_frag_cnt < info->num_sges)
667 for (i = 0; i < info->num_sges; i++)
668 total_size += info->sg_list[i].len;
673 qp->rq_wrid_array[wqe_idx] = info->wr_id;
676 header = LS_64((info->num_sges > 1 ? (info->num_sges - 1) : 0),
680 i40iw_set_fragment(wqe, 0, info->sg_list);
682 for (i = 1, byte_off = 32; i < info->num_sges; i++) {
683 i40iw_set_fragment(wqe, byte_off, &info->sg_list[i]);
744 * i40iw_cq_poll_completion - get cq completion info
746 * @info: cq poll information returned
750 struct i40iw_cq_poll_info *info)
774 info->error = (bool)RS_64(qword3, I40IW_CQ_ERROR);
775 info->push_dropped = (bool)RS_64(qword3, I40IWCQ_PSHDROP);
776 if (info->error) {
777 info->comp_status = I40IW_COMPL_STATUS_FLUSHED;
778 info->major_err = (bool)RS_64(qword3, I40IW_CQ_MAJERR);
779 info->minor_err = (bool)RS_64(qword3, I40IW_CQ_MINERR);
781 info->comp_status = I40IW_COMPL_STATUS_SUCCESS;
787 info->tcp_seq_num = (u32)RS_64(qword0, I40IWCQ_TCPSEQNUM);
789 info->qp_id = (u32)RS_64(qword2, I40IWCQ_QPID);
793 info->solicited_event = (bool)RS_64(qword3, I40IWCQ_SOEVENT);
794 info->is_srq = (bool)RS_64(qword3, I40IWCQ_SRQ);
802 info->qp_handle = (i40iw_qp_handle)(unsigned long)qp;
806 if (info->comp_status == I40IW_COMPL_STATUS_FLUSHED) {
807 info->wr_id = qp->rq_wrid_array[qp->rq_ring.tail];
810 info->wr_id = qp->rq_wrid_array[array_idx];
813 info->op_type = I40IW_OP_TYPE_REC;
815 info->stag_invalid_set = true;
816 info->inv_stag = (u32)RS_64(qword2, I40IWCQ_INVSTAG);
818 info->stag_invalid_set = false;
820 info->bytes_xfered = (u32)RS_64(qword0, I40IWCQ_PAYLDLEN);
831 memset(info, 0, sizeof(struct i40iw_cq_poll_info));
832 return i40iw_cq_poll_completion(cq, info);
836 if (info->comp_status != I40IW_COMPL_STATUS_FLUSHED) {
837 info->wr_id = qp->sq_wrtrk_array[wqe_idx].wrid;
838 info->bytes_xfered = qp->sq_wrtrk_array[wqe_idx].wr_len;
840 info->op_type = (u8)RS_64(qword3, I40IWCQ_OP);
855 info->op_type = op_type;
859 info->wr_id = qp->sq_wrtrk_array[tail].wrid;
860 info->bytes_xfered = qp->sq_wrtrk_array[tail].wr_len;
872 (info->comp_status == I40IW_COMPL_STATUS_FLUSHED))
886 if (info->is_srq)
981 * @info: qp initialization info
991 struct i40iw_qp_uk_init_info *info)
997 if (info->max_sq_frag_cnt > I40IW_MAX_WQ_FRAGMENT_COUNT)
1000 if (info->max_rq_frag_cnt > I40IW_MAX_WQ_FRAGMENT_COUNT)
1002 i40iw_get_wqe_shift(info->max_sq_frag_cnt, info->max_inline_data, &sqshift);
1004 qp->sq_base = info->sq;
1005 qp->rq_base = info->rq;
1006 qp->shadow_area = info->shadow_area;
1007 qp->sq_wrtrk_array = info->sq_wrtrk_array;
1008 qp->rq_wrid_array = info->rq_wrid_array;
1010 qp->wqe_alloc_reg = info->wqe_alloc_reg;
1011 qp->qp_id = info->qp_id;
1013 qp->sq_size = info->sq_size;
1014 qp->push_db = info->push_db;
1015 qp->push_wqe = info->push_wqe;
1017 qp->max_sq_frag_cnt = info->max_sq_frag_cnt;
1031 qp->rq_size = info->rq_size;
1032 qp->max_rq_frag_cnt = info->max_rq_frag_cnt;
1034 switch (info->abi_ver) {
1036 i40iw_get_wqe_shift(info->max_rq_frag_cnt, 0, &rqshift);
1054 * @info: hw cq initialization info
1057 struct i40iw_cq_uk_init_info *info)
1059 if ((info->cq_size < I40IW_MIN_CQ_SIZE) ||
1060 (info->cq_size > I40IW_MAX_CQ_SIZE))
1062 cq->cq_base = (struct i40iw_cqe *)info->cq_base;
1063 cq->cq_id = info->cq_id;
1064 cq->cq_size = info->cq_size;
1065 cq->cqe_alloc_reg = info->cqe_alloc_reg;
1066 cq->shadow_area = info->shadow_area;
1067 cq->avoid_mem_cflct = info->avoid_mem_cflct;