Lines Matching refs:wqe
47 * i40iw_insert_wqe_hdr - write wqe header
48 * @wqe: cqp wqe for header
49 * @header: header for the cqp wqe
51 void i40iw_insert_wqe_hdr(u64 *wqe, u64 header)
54 set_64bit_val(wqe, 24, header);
607 u64 *wqe = NULL;
627 wqe = cqp->sq_base[*wqe_idx].elem;
629 I40IW_CQP_INIT_WQE(wqe);
631 return wqe;
635 * i40iw_sc_cqp_get_next_send_wqe - get next wqe on cqp sq
835 u64 *wqe;
841 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
842 if (!wqe)
845 set_64bit_val(wqe, 16, info->qs_handle);
852 i40iw_insert_wqe_hdr(wqe, header);
855 wqe, I40IW_CQP_WQE_SIZE * 8);
877 u64 *wqe;
882 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
883 if (!wqe)
891 i40iw_insert_wqe_hdr(wqe, header);
893 wqe, I40IW_CQP_WQE_SIZE * 8);
900 * i40iw_sc_set_hmc_resource_profile - cqp wqe for hmc profile
915 u64 *wqe;
920 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
921 if (!wqe)
924 set_64bit_val(wqe, 16,
931 i40iw_insert_wqe_hdr(wqe, header);
934 wqe, I40IW_CQP_WQE_SIZE * 8);
954 * i40iw_sc_manage_hmc_pm_func_table_done - wait for cqp wqe completion for function table
972 * i40iw_sc_commit_fpm_values - cqp wqe for commit fpm values
988 u64 *wqe;
993 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
994 if (!wqe)
997 set_64bit_val(wqe, 16, hmc_fn_id);
998 set_64bit_val(wqe, 32, commit_fpm_mem->pa);
1003 i40iw_insert_wqe_hdr(wqe, header);
1006 wqe, I40IW_CQP_WQE_SIZE * 8);
1045 u64 *wqe;
1048 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1049 if (!wqe)
1052 set_64bit_val(wqe, 32, feat_mem->pa);
1057 i40iw_insert_wqe_hdr(wqe, header);
1060 wqe, I40IW_CQP_WQE_SIZE * 8);
1114 * i40iw_sc_query_fpm_values_done - poll for cqp wqe completion for query fpm
1123 * i40iw_sc_query_fpm_values - cqp wqe query fpm values
1139 u64 *wqe;
1144 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1145 if (!wqe)
1148 set_64bit_val(wqe, 16, hmc_fn_id);
1149 set_64bit_val(wqe, 32, query_fpm_mem->pa);
1154 i40iw_insert_wqe_hdr(wqe, header);
1157 wqe, I40IW_CQP_WQE_SIZE * 8);
1177 * i40iw_sc_add_arp_cache_entry - cqp wqe add arp cache entry
1189 u64 *wqe;
1192 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1193 if (!wqe)
1195 set_64bit_val(wqe, 8, info->reach_max);
1204 set_64bit_val(wqe, 16, temp);
1212 i40iw_insert_wqe_hdr(wqe, header);
1215 wqe, I40IW_CQP_WQE_SIZE * 8);
1235 u64 *wqe;
1238 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1239 if (!wqe)
1245 i40iw_insert_wqe_hdr(wqe, header);
1248 wqe, I40IW_CQP_WQE_SIZE * 8);
1256 * i40iw_sc_query_arp_cache_entry - cqp wqe to query arp and arp index
1268 u64 *wqe;
1271 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1272 if (!wqe)
1280 i40iw_insert_wqe_hdr(wqe, header);
1283 wqe, I40IW_CQP_WQE_SIZE * 8);
1303 u64 *wqe;
1306 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1307 if (!wqe)
1310 set_64bit_val(wqe, 16, info->port);
1316 i40iw_insert_wqe_hdr(wqe, header);
1319 wqe, I40IW_CQP_WQE_SIZE * 8);
1348 u64 *wqe;
1354 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1355 if (!wqe)
1365 set_64bit_val(wqe, 0, temp);
1370 set_64bit_val(wqe,
1374 set_64bit_val(wqe,
1379 set_64bit_val(wqe,
1387 set_64bit_val(wqe, 16, qw2);
1391 set_64bit_val(wqe,
1395 set_64bit_val(wqe,
1400 set_64bit_val(wqe,
1406 set_64bit_val(wqe, 8, qw1);
1414 i40iw_insert_wqe_hdr(wqe, temp);
1417 wqe, I40IW_CQP_WQE_SIZE * 8);
1425 * i40iw_sc_alloc_local_mac_ipaddr_entry - cqp wqe for loc mac entry
1435 u64 *wqe;
1438 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1439 if (!wqe)
1444 i40iw_insert_wqe_hdr(wqe, header);
1446 wqe, I40IW_CQP_WQE_SIZE * 8);
1465 u64 *wqe;
1468 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1469 if (!wqe)
1478 set_64bit_val(wqe, 32, temp);
1484 i40iw_insert_wqe_hdr(wqe, header);
1487 wqe, I40IW_CQP_WQE_SIZE * 8);
1495 * i40iw_sc_del_local_mac_ipaddr_entry - cqp wqe to dele local mac
1509 u64 *wqe;
1512 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1513 if (!wqe)
1521 i40iw_insert_wqe_hdr(wqe, header);
1524 wqe, I40IW_CQP_WQE_SIZE * 8);
1532 * i40iw_sc_cqp_nop - send a nop wqe
1541 u64 *wqe;
1544 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1545 if (!wqe)
1549 i40iw_insert_wqe_hdr(wqe, header);
1551 wqe, I40IW_CQP_WQE_SIZE * 8);
1602 * i40iw_sc_ceq_create - create ceq wqe
1612 u64 *wqe;
1616 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1617 if (!wqe)
1619 set_64bit_val(wqe, 16, ceq->elem_cnt);
1620 set_64bit_val(wqe, 32, (ceq->virtual_map ? 0 : ceq->ceq_elem_pa));
1621 set_64bit_val(wqe, 48, (ceq->virtual_map ? ceq->first_pm_pbl_idx : 0));
1622 set_64bit_val(wqe, 56, LS_64(ceq->tph_val, I40IW_CQPSQ_TPHVAL));
1631 i40iw_insert_wqe_hdr(wqe, header);
1634 wqe, I40IW_CQP_WQE_SIZE * 8);
1642 * i40iw_sc_cceq_create_done - poll for control ceq wqe to complete
1692 u64 *wqe;
1696 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1697 if (!wqe)
1699 set_64bit_val(wqe, 16, ceq->elem_cnt);
1700 set_64bit_val(wqe, 48, ceq->first_pm_pbl_idx);
1707 i40iw_insert_wqe_hdr(wqe, header);
1709 wqe, I40IW_CQP_WQE_SIZE * 8);
1794 u64 *wqe;
1799 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1800 if (!wqe)
1802 set_64bit_val(wqe, 16, aeq->elem_cnt);
1803 set_64bit_val(wqe, 32,
1805 set_64bit_val(wqe, 48,
1813 i40iw_insert_wqe_hdr(wqe, header);
1815 wqe, I40IW_CQP_WQE_SIZE * 8);
1831 u64 *wqe;
1836 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1837 if (!wqe)
1839 set_64bit_val(wqe, 16, aeq->elem_cnt);
1840 set_64bit_val(wqe, 48, aeq->first_pm_pbl_idx);
1845 i40iw_insert_wqe_hdr(wqe, header);
1848 wqe, I40IW_CQP_WQE_SIZE * 8);
2092 u64 *wqe;
2098 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2099 if (!wqe)
2101 set_64bit_val(wqe, 0, ccq->cq_uk.cq_size);
2102 set_64bit_val(wqe, 8, RS_64_1(ccq, 1));
2103 set_64bit_val(wqe, 16,
2105 set_64bit_val(wqe, 32, (ccq->virtual_map ? 0 : ccq->cq_pa));
2106 set_64bit_val(wqe, 40, ccq->shadow_area_pa);
2107 set_64bit_val(wqe, 48,
2109 set_64bit_val(wqe, 56,
2124 i40iw_insert_wqe_hdr(wqe, header);
2127 wqe, I40IW_CQP_WQE_SIZE * 8);
2151 u64 *wqe;
2157 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2158 if (!wqe)
2160 set_64bit_val(wqe, 0, ccq->cq_uk.cq_size);
2161 set_64bit_val(wqe, 8, RS_64_1(ccq, 1));
2162 set_64bit_val(wqe, 40, ccq->shadow_area_pa);
2173 i40iw_insert_wqe_hdr(wqe, header);
2176 wqe, I40IW_CQP_WQE_SIZE * 8);
2250 u64 *wqe;
2261 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2262 if (!wqe)
2265 set_64bit_val(wqe, 0, cq->cq_uk.cq_size);
2266 set_64bit_val(wqe, 8, RS_64_1(cq, 1));
2267 set_64bit_val(wqe,
2271 set_64bit_val(wqe, 32, (cq->virtual_map ? 0 : cq->cq_pa));
2273 set_64bit_val(wqe, 40, cq->shadow_area_pa);
2274 set_64bit_val(wqe, 48, (cq->virtual_map ? cq->first_pm_pbl_idx : 0));
2275 set_64bit_val(wqe, 56, LS_64(cq->tph_val, I40IW_CQPSQ_TPHVAL));
2289 i40iw_insert_wqe_hdr(wqe, header);
2292 wqe, I40IW_CQP_WQE_SIZE * 8);
2310 u64 *wqe;
2314 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2315 if (!wqe)
2317 set_64bit_val(wqe, 0, cq->cq_uk.cq_size);
2318 set_64bit_val(wqe, 8, RS_64_1(cq, 1));
2319 set_64bit_val(wqe, 40, cq->shadow_area_pa);
2320 set_64bit_val(wqe, 48, (cq->virtual_map ? cq->first_pm_pbl_idx : 0));
2333 i40iw_insert_wqe_hdr(wqe, header);
2336 wqe, I40IW_CQP_WQE_SIZE * 8);
2356 u64 *wqe;
2373 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2374 if (!wqe)
2406 set_64bit_val(wqe, 0, cq_size);
2407 set_64bit_val(wqe, 8, RS_64_1(cq, 1));
2408 set_64bit_val(wqe, 16,
2410 set_64bit_val(wqe, 32, (cq->virtual_map ? 0 : cq->cq_pa));
2411 set_64bit_val(wqe, 40, cq->shadow_area_pa);
2412 set_64bit_val(wqe, 48, (cq->virtual_map ? first_pm_pbl_idx : 0));
2413 set_64bit_val(wqe, 56, LS_64(cq->tph_val, I40IW_CQPSQ_TPHVAL));
2428 i40iw_insert_wqe_hdr(wqe, header);
2431 wqe, I40IW_CQP_WQE_SIZE * 8);
2533 u64 *wqe;
2541 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2542 if (!wqe)
2545 set_64bit_val(wqe, 16, qp->hw_host_ctx_pa);
2547 set_64bit_val(wqe, 40, qp->shadow_area_pa);
2560 i40iw_insert_wqe_hdr(wqe, header);
2562 wqe, I40IW_CQP_WQE_SIZE * 8);
2570 * i40iw_sc_qp_modify - modify qp cqp wqe
2582 u64 *wqe;
2589 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2590 if (!wqe)
2602 set_64bit_val(wqe,
2606 set_64bit_val(wqe, 16, qp->hw_host_ctx_pa);
2607 set_64bit_val(wqe, 40, qp->shadow_area_pa);
2625 i40iw_insert_wqe_hdr(wqe, header);
2628 wqe, I40IW_CQP_WQE_SIZE * 8);
2650 u64 *wqe;
2656 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2657 if (!wqe)
2659 set_64bit_val(wqe, 16, qp->hw_host_ctx_pa);
2660 set_64bit_val(wqe, 40, qp->shadow_area_pa);
2669 i40iw_insert_wqe_hdr(wqe, header);
2671 wqe, I40IW_CQP_WQE_SIZE * 8);
2679 * i40iw_sc_qp_flush_wqes - flush qp's wqe
2692 u64 *wqe;
2709 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2710 if (!wqe)
2722 set_64bit_val(wqe, 16, temp);
2727 set_64bit_val(wqe, 8, temp);
2737 i40iw_insert_wqe_hdr(wqe, header);
2740 wqe, I40IW_CQP_WQE_SIZE * 8);
2761 u64 *wqe;
2766 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2767 if (!wqe)
2773 set_64bit_val(wqe, 8, temp);
2780 i40iw_insert_wqe_hdr(wqe, header);
2783 wqe, I40IW_CQP_WQE_SIZE * 8);
2803 u64 *wqe;
2808 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
2809 if (!wqe)
2811 set_64bit_val(wqe, 16, info->buf_pa);
2820 i40iw_insert_wqe_hdr(wqe, header);
2823 wqe, I40IW_CQP_WQE_SIZE * 8);
3031 u64 *wqe;
3041 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
3042 if (!wqe)
3044 set_64bit_val(wqe,
3048 set_64bit_val(wqe,
3051 set_64bit_val(wqe,
3065 i40iw_insert_wqe_hdr(wqe, header);
3068 wqe, I40IW_CQP_WQE_SIZE * 8);
3088 u64 *wqe;
3113 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
3114 if (!wqe)
3118 set_64bit_val(wqe, 0, temp);
3120 set_64bit_val(wqe,
3125 set_64bit_val(wqe,
3130 set_64bit_val(wqe, 32, info->reg_addr_pa);
3131 set_64bit_val(wqe, 48, 0);
3133 set_64bit_val(wqe, 32, 0);
3134 set_64bit_val(wqe, 48, info->first_pm_pbl_index);
3136 set_64bit_val(wqe, 40, info->hmc_fcn_index);
3137 set_64bit_val(wqe, 56, 0);
3151 i40iw_insert_wqe_hdr(wqe, header);
3154 wqe, I40IW_CQP_WQE_SIZE * 8);
3174 u64 *wqe;
3187 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
3188 if (!wqe)
3194 set_64bit_val(wqe,
3198 set_64bit_val(wqe,
3204 set_64bit_val(wqe, 16, temp);
3214 i40iw_insert_wqe_hdr(wqe, header);
3217 wqe, I40IW_CQP_WQE_SIZE * 8);
3238 u64 *wqe;
3242 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
3243 if (!wqe)
3245 set_64bit_val(wqe,
3248 set_64bit_val(wqe,
3256 i40iw_insert_wqe_hdr(wqe, header);
3259 wqe, I40IW_CQP_WQE_SIZE * 8);
3279 u64 *wqe;
3283 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
3284 if (!wqe)
3286 set_64bit_val(wqe,
3293 i40iw_insert_wqe_hdr(wqe, header);
3296 wqe, I40IW_CQP_WQE_SIZE * 8);
3320 u64 *wqe;
3323 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
3324 if (!wqe)
3326 set_64bit_val(wqe, 8, LS_64(pd_id, I40IW_CQPSQ_STAG_PDID));
3327 set_64bit_val(wqe,
3334 i40iw_insert_wqe_hdr(wqe, header);
3337 wqe, I40IW_CQP_WQE_SIZE * 8);
3356 u64 *wqe;
3361 wqe = i40iw_qp_get_next_send_wqe(&qp->qp_uk, &wqe_idx, I40IW_QP_WQE_MIN_SIZE,
3363 if (!wqe)
3370 set_64bit_val(wqe, 0, temp);
3373 set_64bit_val(wqe,
3378 set_64bit_val(wqe,
3395 i40iw_insert_wqe_hdr(wqe, header);
3398 wqe, I40IW_QP_WQE_MIN_SIZE);
3417 u64 *wqe;
3422 wqe = qp_uk->sq_base->elem;
3424 set_64bit_val(wqe, 0, (uintptr_t)lsmm_buf);
3426 set_64bit_val(wqe, 8, (size | LS_64(stag, I40IWQPSQ_FRAG_STAG)));
3428 set_64bit_val(wqe, 16, 0);
3435 i40iw_insert_wqe_hdr(wqe, header);
3438 wqe, I40IW_QP_WQE_MIN_SIZE);
3451 u64 *wqe;
3456 wqe = qp_uk->sq_base->elem;
3458 set_64bit_val(wqe, 0, (uintptr_t)lsmm_buf);
3460 set_64bit_val(wqe, 8, size);
3462 set_64bit_val(wqe, 16, 0);
3469 i40iw_insert_wqe_hdr(wqe, header);
3472 wqe, I40IW_QP_WQE_MIN_SIZE);
3482 u64 *wqe;
3487 wqe = qp_uk->sq_base->elem;
3489 set_64bit_val(wqe, 0, 0);
3490 set_64bit_val(wqe, 8, 0);
3491 set_64bit_val(wqe, 16, 0);
3496 set_64bit_val(wqe, 8, ((u64)0xabcd << 32));
3502 i40iw_insert_wqe_hdr(wqe, header);
3505 wqe, I40IW_QP_WQE_MIN_SIZE);
3509 * i40iw_sc_post_wqe0 - send wqe with opcode
3515 u64 *wqe;
3520 wqe = qp_uk->sq_base->elem;
3522 if (!wqe)
3526 set_64bit_val(wqe, 0, 0);
3527 set_64bit_val(wqe, 8, 0);
3528 set_64bit_val(wqe, 16, 0);
3532 i40iw_insert_wqe_hdr(wqe, header);
3535 set_64bit_val(wqe, 0, 0);
3536 set_64bit_val(wqe, 8, 0);
3537 set_64bit_val(wqe, 16, 0);
3543 i40iw_insert_wqe_hdr(wqe, header);
3722 * cqp_sds_wqe_fill - fill cqp wqe doe sd
3724 * @info; sd info for wqe
3733 u64 *wqe;
3739 wqe = i40iw_sc_cqp_get_next_send_wqe_idx(cqp, scratch, &wqe_idx);
3740 if (!wqe)
3743 I40IW_CQP_INIT_WQE(wqe);
3761 set_64bit_val(wqe, 16, data);
3765 set_64bit_val(wqe, 48,
3769 set_64bit_val(wqe, 56, info->entry[2].data);
3772 set_64bit_val(wqe, 32,
3776 set_64bit_val(wqe, 40, info->entry[1].data);
3779 set_64bit_val(wqe, 0,
3782 set_64bit_val(wqe, 8, info->entry[0].data);
3788 i40iw_insert_wqe_hdr(wqe, header);
3791 wqe, I40IW_CQP_WQE_SIZE * 8);
3796 * i40iw_update_pe_sds - cqp wqe for sd
3851 u64 *wqe;
3853 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
3854 if (!wqe)
3860 i40iw_insert_wqe_hdr(wqe, header);
3863 wqe, I40IW_CQP_WQE_SIZE * 8);
3880 u64 *wqe;
3882 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
3883 if (!wqe)
3885 set_64bit_val(wqe,
3893 i40iw_insert_wqe_hdr(wqe, header);
3896 wqe, I40IW_CQP_WQE_SIZE * 8);
3903 * i40iw_sc_static_hmc_pages_allocated - cqp wqe to allocate hmc pages
3918 u64 *wqe;
3922 wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
3923 if (!wqe)
3925 set_64bit_val(wqe,
3932 i40iw_insert_wqe_hdr(wqe, header);
3935 wqe, I40IW_CQP_WQE_SIZE * 8);
4124 * i40iw_exec_cqp_cmd - execute cqp cmd when wqe are available