Lines Matching defs:ccq
680 * @ccq: ccq sc struct
682 static void i40iw_sc_ccq_arm(struct i40iw_sc_cq *ccq)
691 get_64bit_val(ccq->cq_uk.shadow_area, 32, &temp_val);
704 set_64bit_val(ccq->cq_uk.shadow_area, 32, temp_val);
708 if (ccq->dev->is_pf)
709 i40iw_wr32(ccq->dev->hw, I40E_PFPE_CQARM, ccq->cq_uk.cq_id);
711 i40iw_wr32(ccq->dev->hw, I40E_VFPE_CQARM1, ccq->cq_uk.cq_id);
715 * i40iw_sc_ccq_get_cqe_info - get ccq's cq entry
716 * @ccq: ccq sc struct
720 struct i40iw_sc_cq *ccq,
730 if (ccq->cq_uk.avoid_mem_cflct)
731 cqe = (u64 *)I40IW_GET_CURRENT_EXTENDED_CQ_ELEMENT(&ccq->cq_uk);
733 cqe = (u64 *)I40IW_GET_CURRENT_CQ_ELEMENT(&ccq->cq_uk);
737 if (polarity != ccq->cq_uk.polarity)
758 I40IW_RING_MOVE_HEAD(ccq->cq_uk.cq_ring, ret_code);
759 if (I40IW_RING_GETCURRENT_HEAD(ccq->cq_uk.cq_ring) == 0)
760 ccq->cq_uk.polarity ^= 1;
763 I40IW_RING_MOVE_TAIL(ccq->cq_uk.cq_ring);
764 set_64bit_val(ccq->cq_uk.shadow_area,
766 I40IW_RING_GETCURRENT_HEAD(ccq->cq_uk.cq_ring));
769 ccq->dev->cqp_cmd_stats[OP_COMPLETED_COMMANDS]++;
786 struct i40iw_sc_cq *ccq;
791 ccq = cqp->dev->ccq;
796 if (i40iw_sc_ccq_get_cqe_info(ccq, &info)) {
978 * @wait_type: poll ccq or cqp registers for cqp completion
1129 * @wait_type: poll ccq or cqp registers for cqp completion
2064 info->dev->ccq = cq;
2069 * i40iw_sc_ccq_create_done - poll cqp for ccq create
2070 * @ccq: ccq sc struct
2072 static enum i40iw_status_code i40iw_sc_ccq_create_done(struct i40iw_sc_cq *ccq)
2076 cqp = ccq->dev->cqp;
2082 * @ccq: ccq sc struct
2084 * @check_overflow: overlow flag for ccq
2087 static enum i40iw_status_code i40iw_sc_ccq_create(struct i40iw_sc_cq *ccq,
2097 cqp = ccq->dev->cqp;
2101 set_64bit_val(wqe, 0, ccq->cq_uk.cq_size);
2102 set_64bit_val(wqe, 8, RS_64_1(ccq, 1));
2104 LS_64(ccq->shadow_read_threshold, I40IW_CQPSQ_CQ_SHADOW_READ_THRESHOLD));
2105 set_64bit_val(wqe, 32, (ccq->virtual_map ? 0 : ccq->cq_pa));
2106 set_64bit_val(wqe, 40, ccq->shadow_area_pa);
2108 (ccq->virtual_map ? ccq->first_pm_pbl_idx : 0));
2110 LS_64(ccq->tph_val, I40IW_CQPSQ_TPHVAL));
2112 header = ccq->cq_uk.cq_id |
2113 LS_64((ccq->ceq_id_valid ? ccq->ceq_id : 0), I40IW_CQPSQ_CQ_CEQID) |
2115 LS_64(ccq->pbl_chunk_size, I40IW_CQPSQ_CQ_LPBLSIZE) |
2117 LS_64(ccq->virtual_map, I40IW_CQPSQ_CQ_VIRTMAP) |
2118 LS_64(ccq->ceqe_mask, I40IW_CQPSQ_CQ_ENCEQEMASK) |
2119 LS_64(ccq->ceq_id_valid, I40IW_CQPSQ_CQ_CEQIDVALID) |
2120 LS_64(ccq->tph_en, I40IW_CQPSQ_TPHEN) |
2121 LS_64(ccq->cq_uk.avoid_mem_cflct, I40IW_CQPSQ_CQ_AVOIDMEMCNFLCT) |
2131 ret_code = i40iw_sc_ccq_create_done(ccq);
2141 * i40iw_sc_ccq_destroy - destroy ccq during close
2142 * @ccq: ccq sc struct
2146 static enum i40iw_status_code i40iw_sc_ccq_destroy(struct i40iw_sc_cq *ccq,
2156 cqp = ccq->dev->cqp;
2160 set_64bit_val(wqe, 0, ccq->cq_uk.cq_size);
2161 set_64bit_val(wqe, 8, RS_64_1(ccq, 1));
2162 set_64bit_val(wqe, 40, ccq->shadow_area_pa);
2164 header = ccq->cq_uk.cq_id |
2165 LS_64((ccq->ceq_id_valid ? ccq->ceq_id : 0), I40IW_CQPSQ_CQ_CEQID) |
2167 LS_64(ccq->ceqe_mask, I40IW_CQPSQ_CQ_ENCEQEMASK) |
2168 LS_64(ccq->ceq_id_valid, I40IW_CQPSQ_CQ_CEQIDVALID) |
2169 LS_64(ccq->tph_en, I40IW_CQPSQ_TPHEN) |
2170 LS_64(ccq->cq_uk.avoid_mem_cflct, I40IW_CQPSQ_CQ_AVOIDMEMCNFLCT) |
3604 * i40iw_sc_query_fpm_values needs ccq poll
3605 * because PF ccq is already created.
3816 * i40iw_update_sds_noccq - update sd before ccq created