Lines Matching refs:qw
296 __le64 qw[2];
563 tx->descs[0].qw[0] = SDMA_DESC0_FIRST_DESC_FLAG;
564 tx->descs[0].qw[1] = 0;
566 tx->descs[0].qw[1] |=
619 return (d->qw[1] & SDMA_DESC1_GENERATION_SMASK)
625 return (d->qw[0] & SDMA_DESC0_BYTE_COUNT_SMASK)
631 return (d->qw[0] & SDMA_DESC0_PHY_ADDR_SMASK)
647 /* qw[0] zero; qw[1] first, ahg mode already in from init */
648 desc->qw[1] |= ((u64)type & SDMA_DESC1_GENERATION_MASK)
651 desc->qw[0] = 0;
652 desc->qw[1] = ((u64)type & SDMA_DESC1_GENERATION_MASK)
655 desc->qw[0] |= (((u64)addr & SDMA_DESC0_PHY_ADDR_MASK)
685 tx->descp[last_desc].qw[0] |= SDMA_DESC0_LAST_DESC_FLAG;
686 tx->descp[last_desc].qw[1] |= dd->default_desc1;
688 tx->descp[last_desc].qw[1] |= (SDMA_DESC1_HEAD_TO_HOST_FLAG |