Lines Matching refs:icode
5569 is_ax(dd) && (dd->icode != ICODE_FUNCTIONAL_SIMULATOR)) {
5857 (dd->icode != ICODE_FUNCTIONAL_SIMULATOR))
6614 if (dd->icode != ICODE_FPGA_EMULATION)
7032 if (!(quick_linkup || dd->icode == ICODE_FUNCTIONAL_SIMULATOR))
7314 if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR || quick_linkup)
7372 if ((dd->icode == ICODE_RTL_SILICON) &&
8615 if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR) {
8709 if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR ||
9249 if (loopback && dd->icode == ICODE_FUNCTIONAL_SIMULATOR) {
9318 if ((dd->icode == ICODE_FUNCTIONAL_SIMULATOR) &&
9337 if (dd->icode == ICODE_FPGA_EMULATION) {
9795 if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR)
10748 (quick_linkup || dd->icode == ICODE_FUNCTIONAL_SIMULATOR)) {
10830 if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR)
11809 if (dd->icode == ICODE_FPGA_EMULATION)
11826 if (dd->icode == ICODE_FPGA_EMULATION)
13191 if (dd->icode != ICODE_RTL_SILICON) {
14800 if (dd->icode != ICODE_FUNCTIONAL_SIMULATOR)
15138 dd->icode = reg >> CCE_REVISION2_IMPL_CODE_SHIFT;
15141 dd->icode < ARRAY_SIZE(inames) ?
15142 inames[dd->icode] : "unknown", (int)dd->irev);
15153 if (dd->icode == ICODE_FPGA_EMULATION && is_emulator_p(dd)) {
15174 * Must be after icode is set up - the cclock rate depends
15441 if (dd->icode != ICODE_RTL_SILICON ||