Lines Matching defs:cntr
1317 #define SW_IBP_CNTR(name, cntr) \
1322 access_ibp_##cntr)
1402 dd_dev_err(dd, "Invalid cntr register access mode");
1544 static inline u64 read_write_sw(struct hfi1_devdata *dd, u64 *cntr, int mode,
1550 ret = *cntr;
1552 *cntr = data;
1555 dd_dev_err(dd, "Invalid cntr sw access mode");
1637 u64 get_all_cpu_total(u64 __percpu *cntr)
1643 counter += *per_cpu_ptr(cntr, cpu);
1648 u64 __percpu *cntr,
1657 ret = get_all_cpu_total(cntr) - *z_val;
1661 *z_val = get_all_cpu_total(cntr);
1665 dd_dev_err(dd, "Invalid cntr sw cpu access mode");
4085 dd_dev_err(dd, "Invalid cntr register access mode");
4091 #define def_access_sw_cpu(cntr) \
4092 static u64 access_sw_cpu_##cntr(const struct cntr_entry *entry, \
4096 return read_write_cpu(ppd->dd, &ppd->ibport_data.rvp.z_ ##cntr, \
4097 ppd->ibport_data.rvp.cntr, vl, \
4105 #define def_access_ibp_counter(cntr) \
4106 static u64 access_ibp_##cntr(const struct cntr_entry *entry, \
4114 return read_write_sw(ppd->dd, &ppd->ibport_data.rvp.n_ ##cntr, \
12390 hfi1_cdbg(CNTR, "cntr: %s vl %d psval 0x%llx", entry->name, vl, *psval);
12441 hfi1_cdbg(CNTR, "cntr: %s vl %d psval 0x%llx", entry->name, vl, *psval);
12817 /* fill in port cntr names */