Lines Matching refs:init
1725 static void build_rtr_msg(u8 p2p_type, struct fw_ri_init *init)
1728 memset(&init->u, 0, sizeof(init->u));
1731 init->u.write.opcode = FW_RI_RDMA_WRITE_WR;
1732 init->u.write.stag_sink = cpu_to_be32(1);
1733 init->u.write.to_sink = cpu_to_be64(1);
1734 init->u.write.u.immd_src[0].op = FW_RI_DATA_IMMD;
1735 init->u.write.len16 = DIV_ROUND_UP(
1736 sizeof(init->u.write) + sizeof(struct fw_ri_immd), 16);
1739 init->u.write.opcode = FW_RI_RDMA_READ_WR;
1740 init->u.read.stag_src = cpu_to_be32(1);
1741 init->u.read.to_src_lo = cpu_to_be32(1);
1742 init->u.read.stag_sink = cpu_to_be32(1);
1743 init->u.read.to_sink_lo = cpu_to_be32(1);
1744 init->u.read.len16 = DIV_ROUND_UP(sizeof(init->u.read), 16);
1781 wqe->u.init.type = FW_RI_TYPE_INIT;
1782 wqe->u.init.mpareqbit_p2ptype =
1785 wqe->u.init.mpa_attrs = FW_RI_MPA_IETF_ENABLE;
1787 wqe->u.init.mpa_attrs |= FW_RI_MPA_RX_MARKER_ENABLE;
1789 wqe->u.init.mpa_attrs |= FW_RI_MPA_TX_MARKER_ENABLE;
1791 wqe->u.init.mpa_attrs |= FW_RI_MPA_CRC_ENABLE;
1793 wqe->u.init.qp_caps = FW_RI_QP_RDMA_READ_ENABLE |
1797 wqe->u.init.qp_caps |= FW_RI_QP_FAST_REGISTER_ENABLE |
1799 wqe->u.init.nrqe = cpu_to_be16(t4_rqes_posted(&qhp->wq));
1800 wqe->u.init.pdid = cpu_to_be32(qhp->attr.pd);
1801 wqe->u.init.qpid = cpu_to_be32(qhp->wq.sq.qid);
1802 wqe->u.init.sq_eqid = cpu_to_be32(qhp->wq.sq.qid);
1804 wqe->u.init.rq_eqid = cpu_to_be32(FW_RI_INIT_RQEQID_SRQ |
1807 wqe->u.init.rq_eqid = cpu_to_be32(qhp->wq.rq.qid);
1808 wqe->u.init.hwrqsize = cpu_to_be32(qhp->wq.rq.rqt_size);
1809 wqe->u.init.hwrqaddr = cpu_to_be32(qhp->wq.rq.rqt_hwaddr -
1812 wqe->u.init.scqid = cpu_to_be32(qhp->attr.scq);
1813 wqe->u.init.rcqid = cpu_to_be32(qhp->attr.rcq);
1814 wqe->u.init.ord_max = cpu_to_be32(qhp->attr.max_ord);
1815 wqe->u.init.ird_max = cpu_to_be32(qhp->attr.max_ird);
1816 wqe->u.init.iss = cpu_to_be32(qhp->ep->snd_seq);
1817 wqe->u.init.irs = cpu_to_be32(qhp->ep->rcv_seq);
1819 build_rtr_msg(qhp->attr.mpa_attr.p2p_type, &wqe->u.init);