Lines Matching defs:rdev
74 dev_warn(&dev->rdev.lldi.pdev->dev,
95 static void dealloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq)
97 c4iw_ocqp_pool_free(rdev, sq->dma_addr, sq->memsize);
100 static void dealloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq)
102 dma_free_coherent(&(rdev->lldi.pdev->dev), sq->memsize, sq->queue,
106 static void dealloc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq)
109 dealloc_oc_sq(rdev, sq);
111 dealloc_host_sq(rdev, sq);
114 static int alloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq)
116 if (!ocqp_support || !ocqp_supported(&rdev->lldi))
118 sq->dma_addr = c4iw_ocqp_pool_alloc(rdev, sq->memsize);
121 sq->phys_addr = rdev->oc_mw_pa + sq->dma_addr -
122 rdev->lldi.vr->ocq.start;
123 sq->queue = (__force union t4_wr *)(rdev->oc_mw_kva + sq->dma_addr -
124 rdev->lldi.vr->ocq.start);
129 static int alloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq)
131 sq->queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), sq->memsize,
140 static int alloc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq, int user)
144 ret = alloc_oc_sq(rdev, sq);
146 ret = alloc_host_sq(rdev, sq);
150 static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
157 dealloc_sq(rdev, &wq->sq);
159 c4iw_put_qpid(rdev, wq->sq.qid, uctx);
162 dma_free_coherent(&rdev->lldi.pdev->dev,
165 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size);
167 c4iw_put_qpid(rdev, wq->rq.qid, uctx);
177 void __iomem *c4iw_bar2_addrs(struct c4iw_rdev *rdev, unsigned int qid,
184 ret = cxgb4_bar2_sge_qregs(rdev->lldi.ports[0], qid, qtype,
191 *pbar2_pa = (rdev->bar2_pa + bar2_qoffset) & PAGE_MASK;
193 if (is_t4(rdev->lldi.adapter_type))
196 return rdev->bar2_kva + bar2_qoffset;
199 static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
205 int user = (uctx != &rdev->uctx);
213 wq->sq.qid = c4iw_get_qpid(rdev, uctx);
218 wq->rq.qid = c4iw_get_qpid(rdev, uctx);
250 wq->rq.rqt_hwaddr = c4iw_rqtpool_alloc(rdev, wq->rq.rqt_size);
257 ret = alloc_sq(rdev, &wq->sq, user);
264 wq->rq.queue = dma_alloc_coherent(&rdev->lldi.pdev->dev,
280 wq->db = rdev->lldi.db_reg;
282 wq->sq.bar2_va = c4iw_bar2_addrs(rdev, wq->sq.qid,
287 wq->rq.bar2_va = c4iw_bar2_addrs(rdev, wq->rq.qid,
297 pci_name(rdev->lldi.pdev), wq->sq.qid, wq->rq.qid);
302 wq->rdev = rdev;
331 rdev->hw_queue.t4_eq_status_entries;
360 rdev->hw_queue.t4_eq_status_entries;
382 ret = c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, wq->sq.qid, __func__);
393 dma_free_coherent(&rdev->lldi.pdev->dev,
397 dealloc_sq(rdev, &wq->sq);
400 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size);
408 c4iw_put_qpid(rdev, wq->rq.qid, uctx);
410 c4iw_put_qpid(rdev, wq->sq.qid, uctx);
720 cxgb4_read_sge_timestamp(qhp->rhp->rdev.lldi.ports[0]);
744 cxgb4_read_sge_timestamp(qhp->rhp->rdev.lldi.ports[0]);
807 PBL_OFF(&mhp->rhp->rdev, mhp->attr.pbl_addr)>>3));
1121 if (qhp->rhp->rdev.lldi.write_cmpl_support &&
1122 CHELSIO_CHIP_VERSION(qhp->rhp->rdev.lldi.adapter_type) >=
1164 if (unlikely(!rhp->rdev.lldi.write_w_imm_support)) {
1196 if (rhp->rdev.lldi.fr_nsmr_tpte_wr_support &&
1205 rhp->rdev.lldi.ulptx_memwrite_dsgl);
1237 rhp->rdev.lldi.ports[0]);
1251 if (!rhp->rdev.status_page->db_off) {
1312 qhp->rhp->rdev.lldi.ports[0]);
1331 if (!qhp->rhp->rdev.status_page->db_off) {
1590 c4iw_ofld_send(&qhp->rhp->rdev, skb);
1718 ret = c4iw_ref_send_wait(&rhp->rdev, skb, ep->com.wr_waitp,
1810 rhp->rdev.lldi.vr->rq.start);
1821 ret = c4iw_ref_send_wait(&rhp->rdev, skb, qhp->ep->com.wr_waitp,
2103 destroy_qp(&rhp->rdev, &qhp->wq,
2104 ucontext ? &ucontext->uctx : &rhp->rdev.uctx, !qhp->srq);
2144 if (attrs->cap.max_recv_wr > rhp->rdev.hw_queue.t4_max_rq_size)
2151 if (attrs->cap.max_send_wr > rhp->rdev.hw_queue.t4_max_sq_size)
2169 (sqsize + rhp->rdev.hw_queue.t4_eq_status_entries) *
2175 (rqsize + rhp->rdev.hw_queue.t4_eq_status_entries) *
2186 ret = create_qp(&rhp->rdev, &qhp->wq, &schp->cq, &rchp->cq,
2187 ucontext ? &ucontext->uctx : &rhp->rdev.uctx,
2261 if (rhp->rdev.lldi.write_w_imm_support)
2263 uresp.qid_mask = rhp->rdev.qpmask;
2317 (pci_resource_start(rhp->rdev.lldi.pdev, 0) +
2359 destroy_qp(&rhp->rdev, &qhp->wq,
2360 ucontext ? &ucontext->uctx : &rhp->rdev.uctx, !attrs->srq);
2412 if (!is_t4(to_c4iw_qp(ibqp)->rhp->rdev.lldi.adapter_type) &&
2485 struct c4iw_rdev *rdev = &srq->rhp->rdev;
2509 c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, 0, __func__);
2511 dma_free_coherent(&rdev->lldi.pdev->dev,
2514 c4iw_rqtpool_free(rdev, wq->rqt_hwaddr, wq->rqt_size);
2516 c4iw_put_qpid(rdev, wq->qid, uctx);
2522 struct c4iw_rdev *rdev = &srq->rhp->rdev;
2523 int user = (uctx != &rdev->uctx);
2532 wq->qid = c4iw_get_qpid(rdev, uctx);
2549 wq->rqt_hwaddr = c4iw_rqtpool_alloc(rdev, wq->rqt_size);
2552 wq->rqt_abs_idx = (wq->rqt_hwaddr - rdev->lldi.vr->rq.start) >>
2555 wq->queue = dma_alloc_coherent(&rdev->lldi.pdev->dev, wq->memsize,
2562 wq->bar2_va = c4iw_bar2_addrs(rdev, wq->qid, CXGB4_BAR2_QTYPE_EGRESS,
2572 pci_name(rdev->lldi.pdev), wq->qid);
2600 rdev->hw_queue.t4_eq_status_entries;
2621 rdev->lldi.vr->rq.start);
2625 ret = c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, wq->qid, __func__);
2637 dma_free_coherent(&rdev->lldi.pdev->dev,
2641 c4iw_rqtpool_free(rdev, wq->rqt_hwaddr, wq->rqt_size);
2649 c4iw_put_qpid(rdev, wq->qid, uctx);
2690 if (!rhp->rdev.lldi.vr->srq.size)
2692 if (attrs->attr.max_wr > rhp->rdev.hw_queue.t4_max_rq_size)
2710 srq->idx = c4iw_alloc_srq_idx(&rhp->rdev);
2728 (rqsize + rhp->rdev.hw_queue.t4_eq_status_entries) *
2734 &rhp->rdev.uctx, srq->wr_waitp);
2739 if (CHELSIO_CHIP_VERSION(rhp->rdev.lldi.adapter_type) > CHELSIO_T6)
2755 uresp.qid_mask = rhp->rdev.qpmask;
2791 free_srq_queue(srq, ucontext ? &ucontext->uctx : &rhp->rdev.uctx,
2796 c4iw_free_srq_idx(&rhp->rdev, srq->idx);
2814 free_srq_queue(srq, ucontext ? &ucontext->uctx : &rhp->rdev.uctx,
2816 c4iw_free_srq_idx(&rhp->rdev, srq->idx);