Lines Matching refs:CM36651_PS_CONF1
34 #define CM36651_PS_CONF1 0x00
122 CM36651_PS_CONF1,
162 cm36651->ps_ctrl_regs[CM36651_PS_CONF1] = CM36651_PS_ENABLE |
183 CM36651_PS_CONF1, CM36651_PS_DISABLE);
216 CM36651_PS_CONF1, CM36651_PS_DISABLE);
288 ret = i2c_smbus_write_byte_data(ps_client, CM36651_PS_CONF1,
289 cm36651->ps_ctrl_regs[CM36651_PS_CONF1]);
300 cm36651_ps_reg[CM36651_PS_CONF1],
316 CM36651_PS_CONF1, CM36651_PS_DISABLE);
431 CM36651_PS_CONF1, int_time);