Lines Matching refs:st
26 struct ad5592r_state *st = gpiochip_get_data(chip);
30 mutex_lock(&st->gpio_lock);
32 if (st->gpio_out & BIT(offset))
33 val = st->gpio_val;
35 ret = st->ops->gpio_read(st, &val);
37 mutex_unlock(&st->gpio_lock);
47 struct ad5592r_state *st = gpiochip_get_data(chip);
49 mutex_lock(&st->gpio_lock);
52 st->gpio_val |= BIT(offset);
54 st->gpio_val &= ~BIT(offset);
56 st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
58 mutex_unlock(&st->gpio_lock);
63 struct ad5592r_state *st = gpiochip_get_data(chip);
66 mutex_lock(&st->gpio_lock);
68 st->gpio_out &= ~BIT(offset);
69 st->gpio_in |= BIT(offset);
71 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
75 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
78 mutex_unlock(&st->gpio_lock);
86 struct ad5592r_state *st = gpiochip_get_data(chip);
89 mutex_lock(&st->gpio_lock);
92 st->gpio_val |= BIT(offset);
94 st->gpio_val &= ~BIT(offset);
96 st->gpio_in &= ~BIT(offset);
97 st->gpio_out |= BIT(offset);
99 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
103 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
107 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
110 mutex_unlock(&st->gpio_lock);
117 struct ad5592r_state *st = gpiochip_get_data(chip);
119 if (!(st->gpio_map & BIT(offset))) {
120 dev_err(st->dev, "GPIO %d is reserved by alternate function\n",
128 static int ad5592r_gpio_init(struct ad5592r_state *st)
130 if (!st->gpio_map)
133 st->gpiochip.label = dev_name(st->dev);
134 st->gpiochip.base = -1;
135 st->gpiochip.ngpio = 8;
136 st->gpiochip.parent = st->dev;
137 st->gpiochip.can_sleep = true;
138 st->gpiochip.direction_input = ad5592r_gpio_direction_input;
139 st->gpiochip.direction_output = ad5592r_gpio_direction_output;
140 st->gpiochip.get = ad5592r_gpio_get;
141 st->gpiochip.set = ad5592r_gpio_set;
142 st->gpiochip.request = ad5592r_gpio_request;
143 st->gpiochip.owner = THIS_MODULE;
145 mutex_init(&st->gpio_lock);
147 return gpiochip_add_data(&st->gpiochip, st);
150 static void ad5592r_gpio_cleanup(struct ad5592r_state *st)
152 if (st->gpio_map)
153 gpiochip_remove(&st->gpiochip);
156 static int ad5592r_reset(struct ad5592r_state *st)
160 gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
168 mutex_lock(&st->lock);
170 st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac);
171 mutex_unlock(&st->lock);
179 static int ad5592r_get_vref(struct ad5592r_state *st)
183 if (st->reg) {
184 ret = regulator_get_voltage(st->reg);
194 static int ad5592r_set_channel_modes(struct ad5592r_state *st)
196 const struct ad5592r_rw_ops *ops = st->ops;
202 for (i = 0; i < st->num_channels; i++) {
203 switch (st->channel_modes[i]) {
218 st->gpio_map |= BIT(i);
219 st->gpio_in |= BIT(i); /* Default to input */
224 switch (st->channel_offstate[i]) {
230 st->gpio_out |= BIT(i);
234 st->gpio_out |= BIT(i);
235 st->gpio_val |= BIT(i);
246 mutex_lock(&st->lock);
249 ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown);
253 ret = ops->reg_write(st, AD5592R_REG_TRISTATE, tristate);
258 ret = ops->reg_write(st, AD5592R_REG_DAC_EN, dac);
262 ret = ops->reg_write(st, AD5592R_REG_ADC_EN, adc);
266 ret = ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
270 ret = ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
274 ret = ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
279 ret = ops->reg_read(st, AD5592R_REG_ADC_EN, &read_back);
284 mutex_unlock(&st->lock);
288 static int ad5592r_reset_channel_modes(struct ad5592r_state *st)
292 for (i = 0; i < ARRAY_SIZE(st->channel_modes); i++)
293 st->channel_modes[i] = CH_MODE_UNUSED;
295 return ad5592r_set_channel_modes(st);
301 struct ad5592r_state *st = iio_priv(iio_dev);
313 mutex_lock(&st->lock);
314 ret = st->ops->write_dac(st, chan->channel, val);
316 st->cached_dac[chan->channel] = val;
317 mutex_unlock(&st->lock);
323 if (val == st->scale_avail[0][0] &&
324 val2 == st->scale_avail[0][1])
326 else if (val == st->scale_avail[1][0] &&
327 val2 == st->scale_avail[1][1])
332 mutex_lock(&st->lock);
334 ret = st->ops->reg_read(st, AD5592R_REG_CTRL,
335 &st->cached_gp_ctrl);
337 mutex_unlock(&st->lock);
343 st->cached_gp_ctrl |=
346 st->cached_gp_ctrl &=
350 st->cached_gp_ctrl |=
353 st->cached_gp_ctrl &=
357 ret = st->ops->reg_write(st, AD5592R_REG_CTRL,
358 st->cached_gp_ctrl);
359 mutex_unlock(&st->lock);
375 struct ad5592r_state *st = iio_priv(iio_dev);
382 mutex_lock(&st->lock);
383 ret = st->ops->read_adc(st, chan->channel, &read_val);
384 mutex_unlock(&st->lock);
389 dev_err(st->dev, "Error while reading channel %u\n",
397 mutex_lock(&st->lock);
398 read_val = st->cached_dac[chan->channel];
399 mutex_unlock(&st->lock);
402 dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",
408 *val = ad5592r_get_vref(st);
417 mutex_lock(&st->lock);
420 mult = !!(st->cached_gp_ctrl &
423 mult = !!(st->cached_gp_ctrl &
426 mutex_unlock(&st->lock);
434 ret = ad5592r_get_vref(st);
436 mutex_lock(&st->lock);
438 if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE)
443 mutex_unlock(&st->lock);
476 struct ad5592r_state *st = iio_priv(iio_dev);
479 st->scale_avail[0][0], st->scale_avail[0][1],
480 st->scale_avail[1][0], st->scale_avail[1][1]);
509 struct ad5592r_state *st = iio_priv(iio_dev);
511 num_channels = st->num_channels;
517 device_for_each_child_node(st->dev, child) {
519 if (ret || reg >= ARRAY_SIZE(st->channel_modes))
524 st->channel_modes[reg] = tmp;
528 st->channel_offstate[reg] = tmp;
531 channels = devm_kcalloc(st->dev,
538 switch (st->channel_modes[i]) {
578 static void ad5592r_init_scales(struct ad5592r_state *st, int vref_mV)
582 st->scale_avail[0][0] =
583 div_s64_rem(tmp, 1000000000LL, &st->scale_avail[0][1]);
584 st->scale_avail[1][0] =
585 div_s64_rem(tmp * 2, 1000000000LL, &st->scale_avail[1][1]);
592 struct ad5592r_state *st;
595 iio_dev = devm_iio_device_alloc(dev, sizeof(*st));
599 st = iio_priv(iio_dev);
600 st->dev = dev;
601 st->ops = ops;
602 st->num_channels = 8;
605 st->reg = devm_regulator_get_optional(dev, "vref");
606 if (IS_ERR(st->reg)) {
607 if ((PTR_ERR(st->reg) != -ENODEV) && dev->of_node)
608 return PTR_ERR(st->reg);
610 st->reg = NULL;
612 ret = regulator_enable(st->reg);
621 mutex_init(&st->lock);
623 ad5592r_init_scales(st, ad5592r_get_vref(st));
625 ret = ad5592r_reset(st);
629 ret = ops->reg_write(st, AD5592R_REG_PD,
630 (st->reg == NULL) ? AD5592R_REG_PD_EN_REF : 0);
638 ret = ad5592r_set_channel_modes(st);
646 ret = ad5592r_gpio_init(st);
656 ad5592r_reset_channel_modes(st);
659 if (st->reg)
660 regulator_disable(st->reg);
669 struct ad5592r_state *st = iio_priv(iio_dev);
672 ad5592r_reset_channel_modes(st);
673 ad5592r_gpio_cleanup(st);
675 if (st->reg)
676 regulator_disable(st->reg);