Lines Matching refs:info
180 static inline void vf610_adc_calculate_rates(struct vf610_adc *info)
182 struct vf610_adc_feature *adc_feature = &info->adc_feature;
183 unsigned long adck_rate, ipg_rate = clk_get_rate(info->clk);
187 adck_rate = info->max_adck_rate[adc_feature->conv_mode];
225 info->sample_freq_avail[i] =
230 static inline void vf610_adc_cfg_init(struct vf610_adc *info)
232 struct vf610_adc_feature *adc_feature = &info->adc_feature;
246 vf610_adc_calculate_rates(info);
249 static void vf610_adc_cfg_post_set(struct vf610_adc *info)
251 struct vf610_adc_feature *adc_feature = &info->adc_feature;
283 dev_err(info->dev, "error voltage reference\n");
290 writel(cfg_data, info->regs + VF610_REG_ADC_CFG);
291 writel(gc_data, info->regs + VF610_REG_ADC_GC);
294 static void vf610_adc_calibration(struct vf610_adc *info)
298 if (!info->adc_feature.calibration)
303 writel(hc_cfg, info->regs + VF610_REG_ADC_HC0);
305 adc_gc = readl(info->regs + VF610_REG_ADC_GC);
306 writel(adc_gc | VF610_ADC_CAL, info->regs + VF610_REG_ADC_GC);
308 if (!wait_for_completion_timeout(&info->completion, VF610_ADC_TIMEOUT))
309 dev_err(info->dev, "Timeout for adc calibration\n");
311 adc_gc = readl(info->regs + VF610_REG_ADC_GS);
313 dev_err(info->dev, "ADC calibration failed\n");
315 info->adc_feature.calibration = false;
318 static void vf610_adc_cfg_set(struct vf610_adc *info)
320 struct vf610_adc_feature *adc_feature = &(info->adc_feature);
323 cfg_data = readl(info->regs + VF610_REG_ADC_CFG);
333 writel(cfg_data, info->regs + VF610_REG_ADC_CFG);
336 static void vf610_adc_sample_set(struct vf610_adc *info)
338 struct vf610_adc_feature *adc_feature = &(info->adc_feature);
341 cfg_data = readl(info->regs + VF610_REG_ADC_CFG);
342 gc_data = readl(info->regs + VF610_REG_ADC_GC);
357 dev_err(info->dev, "error resolution mode\n");
381 dev_err(info->dev, "error clk divider\n");
419 dev_err(info->dev, "error in sample time select\n");
444 dev_err(info->dev,
448 writel(cfg_data, info->regs + VF610_REG_ADC_CFG);
449 writel(gc_data, info->regs + VF610_REG_ADC_GC);
452 static void vf610_adc_hw_init(struct vf610_adc *info)
455 vf610_adc_cfg_post_set(info);
456 vf610_adc_sample_set(info);
459 vf610_adc_calibration(info);
462 vf610_adc_cfg_set(info);
469 struct vf610_adc *info = iio_priv(indio_dev);
472 info->adc_feature.conv_mode = mode;
473 vf610_adc_calculate_rates(info);
474 vf610_adc_hw_init(info);
483 struct vf610_adc *info = iio_priv(indio_dev);
485 return info->adc_feature.conv_mode;
553 static int vf610_adc_read_data(struct vf610_adc *info)
557 result = readl(info->regs + VF610_REG_ADC_R0);
559 switch (info->adc_feature.res_mode) {
579 struct vf610_adc *info = iio_priv(indio_dev);
582 coco = readl(info->regs + VF610_REG_ADC_HS);
584 info->value = vf610_adc_read_data(info);
586 info->scan.chan = info->value;
588 &info->scan,
592 complete(&info->completion);
601 struct vf610_adc *info = iio_priv(dev_to_iio_dev(dev));
605 for (i = 0; i < ARRAY_SIZE(info->sample_freq_avail); i++)
607 "%u ", info->sample_freq_avail[i]);
632 struct vf610_adc *info = iio_priv(indio_dev);
645 reinit_completion(&info->completion);
648 writel(hc_cfg, info->regs + VF610_REG_ADC_HC0);
650 (&info->completion, VF610_ADC_TIMEOUT);
662 *val = info->value;
670 *val = 25000 - ((int)info->value - VF610_VTEMP25_3V3) *
683 *val = info->vref_uv / 1000;
684 *val2 = info->adc_feature.res_mode;
688 *val = info->sample_freq_avail[info->adc_feature.sample_rate];
705 struct vf610_adc *info = iio_priv(indio_dev);
711 i < ARRAY_SIZE(info->sample_freq_avail);
713 if (val == info->sample_freq_avail[i]) {
714 info->adc_feature.sample_rate = i;
715 vf610_adc_sample_set(info);
729 struct vf610_adc *info = iio_priv(indio_dev);
733 val = readl(info->regs + VF610_REG_ADC_GC);
735 writel(val, info->regs + VF610_REG_ADC_GC);
743 writel(val, info->regs + VF610_REG_ADC_HC0);
750 struct vf610_adc *info = iio_priv(indio_dev);
754 val = readl(info->regs + VF610_REG_ADC_GC);
756 writel(val, info->regs + VF610_REG_ADC_GC);
761 writel(hc_cfg, info->regs + VF610_REG_ADC_HC0);
776 struct vf610_adc *info = iio_priv(indio_dev);
782 *readval = readl(info->regs + reg);
802 struct vf610_adc *info;
813 info = iio_priv(indio_dev);
814 info->dev = &pdev->dev;
816 info->regs = devm_platform_ioremap_resource(pdev, 0);
817 if (IS_ERR(info->regs))
818 return PTR_ERR(info->regs);
824 ret = devm_request_irq(info->dev, irq,
832 info->clk = devm_clk_get(&pdev->dev, "adc");
833 if (IS_ERR(info->clk)) {
835 PTR_ERR(info->clk));
836 return PTR_ERR(info->clk);
839 info->vref = devm_regulator_get(&pdev->dev, "vref");
840 if (IS_ERR(info->vref))
841 return PTR_ERR(info->vref);
843 ret = regulator_enable(info->vref);
847 info->vref_uv = regulator_get_voltage(info->vref);
850 info->max_adck_rate, 3);
853 &info->adc_feature.default_sample_time);
855 info->adc_feature.default_sample_time = DEFAULT_SAMPLE_TIME;
859 init_completion(&info->completion);
862 indio_dev->info = &vf610_adc_iio_info;
867 ret = clk_prepare_enable(info->clk);
874 vf610_adc_cfg_init(info);
875 vf610_adc_hw_init(info);
895 clk_disable_unprepare(info->clk);
897 regulator_disable(info->vref);
905 struct vf610_adc *info = iio_priv(indio_dev);
909 regulator_disable(info->vref);
910 clk_disable_unprepare(info->clk);
919 struct vf610_adc *info = iio_priv(indio_dev);
923 hc_cfg = readl(info->regs + VF610_REG_ADC_HC0);
925 writel(hc_cfg, info->regs + VF610_REG_ADC_HC0);
927 clk_disable_unprepare(info->clk);
928 regulator_disable(info->vref);
936 struct vf610_adc *info = iio_priv(indio_dev);
939 ret = regulator_enable(info->vref);
943 ret = clk_prepare_enable(info->clk);
947 vf610_adc_hw_init(info);
952 regulator_disable(info->vref);