Lines Matching refs:ret
141 int ret;
143 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,
147 if (ret < 0) {
148 dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret);
149 return ret;
152 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,
157 if (ret < 0) {
158 dev_err(adc->dev, "AUTO_CTRL update failed: %d\n", ret);
159 return ret;
164 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,
167 if (ret < 0)
168 dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret);
170 return ret;
195 int ret;
198 ret = palmas_update_bits(adc->palmas, PALMAS_INTERRUPT_BASE,
202 ret = palmas_update_bits(adc->palmas, PALMAS_INTERRUPT_BASE,
206 if (ret < 0)
207 dev_err(adc->dev, "GPADC INT MASK update failed: %d\n", ret);
209 return ret;
216 int ret;
221 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,
224 if (ret < 0) {
225 dev_err(adc->dev, "RT_CTRL update failed: %d\n", ret);
226 return ret;
237 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,
239 if (ret < 0) {
241 "Failed to update current setting: %d\n", ret);
242 return ret;
248 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,
250 if (ret < 0) {
251 dev_err(adc->dev, "SW_SELECT update failed: %d\n", ret);
252 return ret;
255 ret = palmas_write(adc->palmas, PALMAS_GPADC_BASE,
257 if (ret < 0)
258 dev_err(adc->dev, "SW_SELECT write failed: %d\n", ret);
260 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,
263 if (ret < 0) {
264 dev_err(adc->dev, "CTRL1 update failed: %d\n", ret);
265 return ret;
269 return ret;
274 int ret;
276 ret = palmas_gpadc_enable(adc, adc_chan, true);
277 if (ret < 0)
278 return ret;
294 int ret;
301 ret = palmas_read(adc->palmas, PALMAS_TRIM_GPADC_BASE,
303 if (ret < 0) {
304 dev_err(adc->dev, "TRIM read failed: %d\n", ret);
308 ret = palmas_read(adc->palmas, PALMAS_TRIM_GPADC_BASE,
310 if (ret < 0) {
311 dev_err(adc->dev, "TRIM read failed: %d\n", ret);
327 return ret;
333 int ret;
336 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,
340 if (ret < 0) {
341 dev_err(adc->dev, "SELECT_SW_START write failed: %d\n", ret);
342 return ret;
345 ret = wait_for_completion_timeout(&adc->conv_completion,
347 if (ret == 0) {
352 ret = palmas_bulk_read(adc->palmas, PALMAS_GPADC_BASE,
354 if (ret < 0) {
355 dev_err(adc->dev, "SW_CONV0_LSB read failed: %d\n", ret);
356 return ret;
359 ret = val & 0xFFF;
361 return ret;
386 int ret = 0;
396 ret = palmas_gpadc_read_prepare(adc, adc_chan);
397 if (ret < 0)
400 ret = palmas_gpadc_start_conversion(adc, adc_chan);
401 if (ret < 0) {
408 ret = palmas_gpadc_get_calibrated_code(
409 adc, adc_chan, ret);
411 *val = ret;
413 ret = IIO_VAL_INT;
418 return ret;
424 return ret;
465 int ret;
472 ret = of_property_read_u32(np, "ti,channel0-current-microamp", &pval);
473 if (!ret)
476 ret = of_property_read_u32(np, "ti,channel3-current-microamp", &pval);
477 if (!ret)
494 int ret, i;
502 ret = palmas_gpadc_get_adc_dt_data(pdev, &gpadc_pdata);
503 if (ret < 0)
504 return ret;
527 ret = adc->irq;
530 ret = request_threaded_irq(adc->irq, NULL,
534 if (ret < 0) {
536 "request irq %d failed: %d\n", adc->irq, ret);
545 ret = request_threaded_irq(adc->irq_auto_0, NULL,
549 if (ret < 0) {
551 adc->irq_auto_0, ret);
561 ret = request_threaded_irq(adc->irq_auto_1, NULL,
565 if (ret < 0) {
567 adc->irq_auto_1, ret);
600 ret = iio_device_register(indio_dev);
601 if (ret < 0) {
602 dev_err(adc->dev, "iio_device_register() failed: %d\n", ret);
626 return ret;
653 int ret;
663 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,
667 if (ret < 0) {
668 dev_err(adc->dev, "AUTO_CTRL write failed: %d\n", ret);
669 return ret;
686 ret = palmas_write(adc->palmas, PALMAS_GPADC_BASE,
688 if (ret < 0) {
690 "THRES_CONV0_LSB write failed: %d\n", ret);
691 return ret;
694 ret = palmas_write(adc->palmas, PALMAS_GPADC_BASE,
697 if (ret < 0) {
699 "THRES_CONV0_MSB write failed: %d\n", ret);
700 return ret;
717 ret = palmas_write(adc->palmas, PALMAS_GPADC_BASE,
719 if (ret < 0) {
721 "THRES_CONV1_LSB write failed: %d\n", ret);
722 return ret;
725 ret = palmas_write(adc->palmas, PALMAS_GPADC_BASE,
728 if (ret < 0) {
730 "THRES_CONV1_MSB write failed: %d\n", ret);
731 return ret;
735 ret = palmas_write(adc->palmas, PALMAS_GPADC_BASE,
737 if (ret < 0) {
738 dev_err(adc->dev, "AUTO_SELECT write failed: %d\n", ret);
739 return ret;
742 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,
746 if (ret < 0)
747 dev_err(adc->dev, "AUTO_CTRL write failed: %d\n", ret);
749 return ret;
754 int ret;
756 ret = palmas_write(adc->palmas, PALMAS_GPADC_BASE,
758 if (ret < 0) {
759 dev_err(adc->dev, "AUTO_SELECT write failed: %d\n", ret);
760 return ret;
763 ret = palmas_disable_auto_conversion(adc);
764 if (ret < 0)
765 dev_err(adc->dev, "Disable auto conversion failed: %d\n", ret);
767 return ret;
775 int ret;
780 ret = palmas_adc_wakeup_configure(adc);
781 if (ret < 0)
782 return ret;
798 int ret;
803 ret = palmas_adc_wakeup_reset(adc);
804 if (ret < 0)
805 return ret;