Lines Matching refs:info
78 struct npcm_adc *info = iio_priv(indio_dev);
80 regtemp = ioread32(info->regs + NPCM_ADCCON);
82 iowrite32(regtemp, info->regs + NPCM_ADCCON);
83 wake_up_interruptible(&info->wq);
84 info->int_status = true;
90 static int npcm_adc_read(struct npcm_adc *info, int *val, u8 channel)
96 regtemp = ioread32(info->regs + NPCM_ADCCON);
98 info->int_status = false;
100 NPCM_ADCCON_ADC_CONV, info->regs + NPCM_ADCCON);
102 ret = wait_event_interruptible_timeout(info->wq, info->int_status,
105 regtemp = ioread32(info->regs + NPCM_ADCCON);
108 reset_control_assert(info->reset);
110 reset_control_deassert(info->reset);
115 info->regs + NPCM_ADCCON);
116 dev_err(info->dev, "RESET ADC Complete\n");
123 *val = NPCM_ADC_DATA_MASK(ioread32(info->regs + NPCM_ADCDATA));
134 struct npcm_adc *info = iio_priv(indio_dev);
139 ret = npcm_adc_read(info, val, chan->channel);
142 dev_err(info->dev, "NPCM ADC read failed\n");
147 if (!IS_ERR(info->vref)) {
148 vref_uv = regulator_get_voltage(info->vref);
156 *val = info->adc_sample_hz;
181 struct npcm_adc *info;
185 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
188 info = iio_priv(indio_dev);
190 info->dev = &pdev->dev;
192 info->regs = devm_platform_ioremap_resource(pdev, 0);
193 if (IS_ERR(info->regs))
194 return PTR_ERR(info->regs);
196 info->reset = devm_reset_control_get(&pdev->dev, NULL);
197 if (IS_ERR(info->reset))
198 return PTR_ERR(info->reset);
200 info->adc_clk = devm_clk_get(&pdev->dev, NULL);
201 if (IS_ERR(info->adc_clk)) {
203 return PTR_ERR(info->adc_clk);
207 reg_con = ioread32(info->regs + NPCM_ADCCON);
210 info->adc_sample_hz = clk_get_rate(info->adc_clk) / ((div + 1) * 2);
225 reg_con = ioread32(info->regs + NPCM_ADCCON);
226 info->vref = devm_regulator_get_optional(&pdev->dev, "vref");
227 if (!IS_ERR(info->vref)) {
228 ret = regulator_enable(info->vref);
235 info->regs + NPCM_ADCCON);
241 if (PTR_ERR(info->vref) != -ENODEV) {
242 ret = PTR_ERR(info->vref);
248 info->regs + NPCM_ADCCON);
251 init_waitqueue_head(&info->wq);
253 reg_con = ioread32(info->regs + NPCM_ADCCON);
257 iowrite32(reg_con, info->regs + NPCM_ADCCON);
260 iowrite32(reg_con | NPCM_ADCCON_ADC_CONV, info->regs + NPCM_ADCCON);
264 indio_dev->info = &npcm_adc_iio_info;
280 iowrite32(reg_con & ~NPCM_ADCCON_ADC_EN, info->regs + NPCM_ADCCON);
281 if (!IS_ERR(info->vref))
282 regulator_disable(info->vref);
284 clk_disable_unprepare(info->adc_clk);
292 struct npcm_adc *info = iio_priv(indio_dev);
297 regtemp = ioread32(info->regs + NPCM_ADCCON);
298 iowrite32(regtemp & ~NPCM_ADCCON_ADC_EN, info->regs + NPCM_ADCCON);
299 if (!IS_ERR(info->vref))
300 regulator_disable(info->vref);
301 clk_disable_unprepare(info->adc_clk);