Lines Matching defs:adc
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
98 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
112 struct ingenic_adc *adc = iio_priv(iio_dev);
114 mutex_lock(&adc->lock);
117 readl(adc->base + JZ_ADC_REG_ADCMD);
124 adc->base + JZ_ADC_REG_ADCMD);
130 adc->base + JZ_ADC_REG_ADCMD);
138 adc->base + JZ_ADC_REG_ADCMD);
144 adc->base + JZ_ADC_REG_ADCMD);
151 adc->base + JZ_ADC_REG_ADCMD);
156 adc->base + JZ_ADC_REG_ADCMD);
160 writel(0, adc->base + JZ_ADC_REG_ADCMD);
162 mutex_unlock(&adc->lock);
165 static void ingenic_adc_set_config(struct ingenic_adc *adc,
171 mutex_lock(&adc->lock);
173 cfg = readl(adc->base + JZ_ADC_REG_CFG) & ~mask;
175 writel(cfg, adc->base + JZ_ADC_REG_CFG);
177 mutex_unlock(&adc->lock);
180 static void ingenic_adc_enable_unlocked(struct ingenic_adc *adc,
186 val = readb(adc->base + JZ_ADC_REG_ENABLE);
193 writeb(val, adc->base + JZ_ADC_REG_ENABLE);
196 static void ingenic_adc_enable(struct ingenic_adc *adc,
200 mutex_lock(&adc->lock);
201 ingenic_adc_enable_unlocked(adc, engine, enabled);
202 mutex_unlock(&adc->lock);
205 static int ingenic_adc_capture(struct ingenic_adc *adc,
217 mutex_lock(&adc->lock);
218 cfg = readl(adc->base + JZ_ADC_REG_CFG);
219 writel(cfg & ~JZ_ADC_REG_CFG_CMD_SEL, adc->base + JZ_ADC_REG_CFG);
221 ingenic_adc_enable_unlocked(adc, engine, true);
222 ret = readb_poll_timeout(adc->base + JZ_ADC_REG_ENABLE, val,
225 ingenic_adc_enable_unlocked(adc, engine, false);
227 writel(cfg, adc->base + JZ_ADC_REG_CFG);
228 mutex_unlock(&adc->lock);
239 struct ingenic_adc *adc = iio_priv(iio_dev);
247 if (!adc->soc_data->battery_vref_mode)
250 ret = clk_enable(adc->clk);
258 ingenic_adc_set_config(adc,
261 adc->low_vref_mode = false;
263 ingenic_adc_set_config(adc,
266 adc->low_vref_mode = true;
269 clk_disable(adc->clk);
306 static int jz4725b_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc)
312 parent_clk = clk_get_parent(adc->clk);
337 adc->base + JZ_ADC_REG_ADCLK);
342 static int jz4770_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc)
348 parent_clk = clk_get_parent(adc->clk);
375 adc->base + JZ_ADC_REG_ADCLK);
550 struct ingenic_adc *adc = iio_priv(iio_dev);
555 *length = adc->soc_data->battery_raw_avail_size;
556 *vals = adc->soc_data->battery_raw_avail;
560 *length = adc->soc_data->battery_scale_avail_size;
561 *vals = adc->soc_data->battery_scale_avail;
573 struct ingenic_adc *adc = iio_priv(iio_dev);
575 ret = clk_enable(adc->clk);
583 mutex_lock(&adc->aux_lock);
584 if (adc->soc_data->has_aux2 && engine == 0) {
586 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit);
589 ret = ingenic_adc_capture(adc, engine);
596 *val = readw(adc->base + JZ_ADC_REG_ADSDAT);
599 *val = readw(adc->base + JZ_ADC_REG_ADBDAT);
605 mutex_unlock(&adc->aux_lock);
606 clk_disable(adc->clk);
617 struct ingenic_adc *adc = iio_priv(iio_dev);
630 if (adc->low_vref_mode) {
634 *val = adc->soc_data->battery_high_vref;
635 *val2 = adc->soc_data->battery_high_vref_bits;
675 struct ingenic_adc *adc = iio_priv(iio_dev);
678 ret = clk_enable(adc->clk);
687 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_TOUCH_OPS_MASK,
691 writew(80, adc->base + JZ_ADC_REG_ADWAIT);
692 writew(2, adc->base + JZ_ADC_REG_ADSAME);
693 writeb((u8)~JZ_ADC_IRQ_TOUCH, adc->base + JZ_ADC_REG_CTRL);
694 writel(0, adc->base + JZ_ADC_REG_ADTCH);
696 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_CMD_SEL,
700 ingenic_adc_enable(adc, 2, true);
707 struct ingenic_adc *adc = iio_priv(iio_dev);
709 ingenic_adc_enable(adc, 2, false);
711 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_CMD_SEL, 0);
713 writeb(0xff, adc->base + JZ_ADC_REG_CTRL);
714 writeb(0xff, adc->base + JZ_ADC_REG_STATUS);
715 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_TOUCH_OPS_MASK, 0);
716 writew(0, adc->base + JZ_ADC_REG_ADSAME);
717 writew(0, adc->base + JZ_ADC_REG_ADWAIT);
718 clk_disable(adc->clk);
731 struct ingenic_adc *adc = iio_priv(iio_dev);
738 tdat[i] = readl(adc->base + JZ_ADC_REG_ADTCH);
744 writeb(JZ_ADC_IRQ_TOUCH, adc->base + JZ_ADC_REG_STATUS);
753 struct ingenic_adc *adc;
761 iio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
765 adc = iio_priv(iio_dev);
766 mutex_init(&adc->lock);
767 mutex_init(&adc->aux_lock);
768 adc->soc_data = soc_data;
781 adc->base = devm_platform_ioremap_resource(pdev, 0);
782 if (IS_ERR(adc->base))
783 return PTR_ERR(adc->base);
785 adc->clk = devm_clk_get(dev, "adc");
786 if (IS_ERR(adc->clk)) {
788 return PTR_ERR(adc->clk);
791 ret = clk_prepare_enable(adc->clk);
799 ret = soc_data->init_clk_div(dev, adc);
801 clk_disable_unprepare(adc->clk);
807 writeb(0x00, adc->base + JZ_ADC_REG_ENABLE);
808 writeb(0xff, adc->base + JZ_ADC_REG_CTRL);
810 clk_disable(adc->clk);
812 ret = devm_add_action_or_reset(dev, ingenic_adc_clk_cleanup, adc->clk);
818 iio_dev->name = "jz-adc";
833 { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, },
834 { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, },
835 { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, },
842 .name = "ingenic-adc",