Lines Matching defs:dma_st
403 struct at91_adc_dma dma_st;
752 if (st->dma_st.dma_chan)
775 status = dmaengine_tx_status(st->dma_st.dma_chan,
776 st->dma_st.dma_chan->cookie,
782 i = st->dma_st.rx_buf_sz - state.residue;
785 if (i >= st->dma_st.buf_idx)
786 size = i - st->dma_st.buf_idx;
788 size = st->dma_st.rx_buf_sz + i - st->dma_st.buf_idx;
807 if (!st->dma_st.dma_chan)
811 st->dma_st.buf_idx = 0;
817 st->dma_st.rx_buf_sz = 0;
827 st->dma_st.rx_buf_sz += chan->scan_type.storagebits / 8;
829 st->dma_st.rx_buf_sz *= st->dma_st.watermark;
832 desc = dmaengine_prep_dma_cyclic(st->dma_st.dma_chan,
833 st->dma_st.rx_dma_buf,
834 st->dma_st.rx_buf_sz,
835 st->dma_st.rx_buf_sz / 2,
850 dmaengine_terminate_async(st->dma_st.dma_chan);
857 dma_async_issue_pending(st->dma_st.dma_chan);
860 st->dma_st.dma_ts = iio_get_time_ns(indio_dev);
871 if (st->dma_st.dma_chan)
975 if (st->dma_st.dma_chan)
986 if (st->dma_st.dma_chan)
987 dmaengine_terminate_sync(st->dma_st.dma_chan);
1101 sample_size = div_s64(st->dma_st.rx_buf_sz, st->dma_st.watermark);
1109 interval = div_s64((ns - st->dma_st.dma_ts), sample_count);
1117 &st->dma_st.rx_buf[st->dma_st.buf_idx],
1121 (st->dma_st.rx_buf + st->dma_st.buf_idx),
1122 (st->dma_st.dma_ts + interval * sample_index));
1126 st->dma_st.buf_idx += sample_size;
1128 if (st->dma_st.buf_idx >= st->dma_st.rx_buf_sz)
1129 st->dma_st.buf_idx = 0;
1133 st->dma_st.dma_ts = iio_get_time_ns(indio_dev);
1149 if (st->dma_st.dma_chan)
1322 } else if (iio_buffer_enabled(indio) && st->dma_st.dma_chan) {
1502 if (st->dma_st.dma_chan)
1505 st->dma_st.dma_chan = dma_request_chan(&pdev->dev, "rx");
1506 if (IS_ERR(st->dma_st.dma_chan)) {
1508 st->dma_st.dma_chan = NULL;
1512 st->dma_st.rx_buf = dma_alloc_coherent(st->dma_st.dma_chan->device->dev,
1514 &st->dma_st.rx_dma_buf,
1516 if (!st->dma_st.rx_buf) {
1523 config.src_addr = (phys_addr_t)(st->dma_st.phys_addr
1529 if (dmaengine_slave_config(st->dma_st.dma_chan, &config)) {
1535 dma_chan_name(st->dma_st.dma_chan));
1540 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE,
1541 st->dma_st.rx_buf, st->dma_st.rx_dma_buf);
1543 dma_release_channel(st->dma_st.dma_chan);
1544 st->dma_st.dma_chan = NULL;
1558 if (!st->dma_st.dma_chan)
1562 dmaengine_terminate_sync(st->dma_st.dma_chan);
1564 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE,
1565 st->dma_st.rx_buf, st->dma_st.rx_dma_buf);
1566 dma_release_channel(st->dma_st.dma_chan);
1567 st->dma_st.dma_chan = NULL;
1586 st->dma_st.watermark = val;
1653 return scnprintf(buf, PAGE_SIZE, "%d\n", !!st->dma_st.dma_chan);
1662 return scnprintf(buf, PAGE_SIZE, "%d\n", st->dma_st.watermark);
1790 st->dma_st.phys_addr = res->start;
1855 st->dma_st.watermark = 1;