Lines Matching refs:base
84 static u16 tx4939ide_readw(void __iomem *base, u32 reg)
86 return __raw_readw(base + tx4939ide_swizzlew(reg));
88 static u8 tx4939ide_readb(void __iomem *base, u32 reg)
90 return __raw_readb(base + tx4939ide_swizzleb(reg));
92 static void tx4939ide_writel(u32 val, void __iomem *base, u32 reg)
94 __raw_writel(val, base + tx4939ide_swizzlel(reg));
96 static void tx4939ide_writew(u16 val, void __iomem *base, u32 reg)
98 __raw_writew(val, base + tx4939ide_swizzlew(reg));
100 static void tx4939ide_writeb(u8 val, void __iomem *base, u32 reg)
102 __raw_writeb(val, base + tx4939ide_swizzleb(reg));
151 void __iomem *base = TX4939IDE_BASE(hwif);
152 u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl);
156 u16 sysctl = tx4939ide_readw(base, TX4939IDE_Sys_Ctl);
158 tx4939ide_writew(sysctl | 0x4000, base, TX4939IDE_Sys_Ctl);
161 tx4939ide_writew(sysctl, base, TX4939IDE_Sys_Ctl);
176 void __iomem *base;
186 base = TX4939IDE_BASE(hwif);
188 tx4939ide_writew(ctl, base, TX4939IDE_Int_Ctl);
193 void __iomem *base = TX4939IDE_BASE(hwif);
195 return tx4939ide_readw(base, TX4939IDE_Sys_Ctl) & 0x2000 ?
204 void __iomem *base = TX4939IDE_BASE(hwif);
205 u8 dma_stat = tx4939ide_readb(base, TX4939IDE_DMA_Stat);
212 tx4939ide_writeb(dma_stat, base, TX4939IDE_DMA_Stat);
218 static u8 tx4939ide_clear_dma_status(void __iomem *base)
223 dma_stat = tx4939ide_readb(base, TX4939IDE_DMA_Stat);
225 tx4939ide_writeb(dma_stat | ATA_DMA_INTR | ATA_DMA_ERR, base,
228 tx4939ide_writew(TX4939IDE_IGNORE_INTS << 8, base, TX4939IDE_Int_Ctl);
290 void __iomem *base = TX4939IDE_BASE(hwif);
298 tx4939ide_writel(hwif->dmatable_dma, base, TX4939IDE_PRD_Ptr);
301 tx4939ide_writeb(rw, base, TX4939IDE_DMA_Cmd);
304 tx4939ide_clear_dma_status(base);
306 tx4939ide_writew(SECTOR_SIZE / 2, base, drive->dn ?
309 tx4939ide_writew(blk_rq_sectors(cmd->rq), base, TX4939IDE_Sec_Cnt);
318 void __iomem *base = TX4939IDE_BASE(hwif);
319 u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl);
322 dma_cmd = tx4939ide_readb(base, TX4939IDE_DMA_Cmd);
324 tx4939ide_writeb(dma_cmd & ~ATA_DMA_START, base, TX4939IDE_DMA_Cmd);
327 dma_stat = tx4939ide_clear_dma_status(base);
345 void __iomem *base = TX4939IDE_BASE(hwif);
355 stat = tx4939ide_readb(base, TX4939IDE_AltStat_DevCtl);
364 dma_stat = tx4939ide_readb(base, TX4939IDE_DMA_Stat);
377 tx4939ide_writew(ctl, base, TX4939IDE_Int_Ctl);
384 void __iomem *base = TX4939IDE_BASE(hwif);
386 return tx4939ide_readb(base, TX4939IDE_DMA_Stat);
394 void __iomem *base = TX4939IDE_BASE(hwif);
397 tx4939ide_writew(0x8000, base, TX4939IDE_Sys_Ctl);
400 tx4939ide_writew(0x0000, base, TX4939IDE_Sys_Ctl);
402 tx4939ide_writew((TX4939IDE_IGNORE_INTS << 8) | 0xff, base,
405 tx4939ide_writew(0x0008, base, TX4939IDE_Lo_Burst_Cnt);
406 tx4939ide_writew(0, base, TX4939IDE_Up_Burst_Cnt);
423 void __iomem *base = TX4939IDE_BASE(hwif);
432 tx4939ide_writew(sysctl, base, TX4939IDE_Sys_Ctl);
580 pr_info("TX4939 IDE interface (base %#lx, irq %d)\n", mapbase, irq);
584 /* use extra_base for base address of the all registers */