Lines Matching refs:pmif
413 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
416 writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG));
418 writel(pmif->timings[0], PMAC_IDE_REG(IDE_TIMING_CONFIG));
430 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
433 writel(pmif->timings[1], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
434 writel(pmif->timings[3], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));
436 writel(pmif->timings[0], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
437 writel(pmif->timings[2], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));
449 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
451 if (pmif->kind == controller_sh_ata6 ||
452 pmif->kind == controller_un_ata6 ||
453 pmif->kind == controller_k2_ata6)
494 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
503 timings = &pmif->timings[drive->dn & 1];
508 switch (pmif->kind) {
775 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
781 timings = &pmif->timings[unit];
782 timings2 = &pmif->timings[unit+2];
789 if (pmif->kind == controller_kl_ata4)
791 else if (pmif->kind == controller_un_ata6
792 || pmif->kind == controller_k2_ata6)
794 else if (pmif->kind == controller_sh_ata6)
799 set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed);
816 sanitize_timings(pmac_ide_hwif_t *pmif)
820 switch(pmif->kind) {
842 pmif->timings[0] = pmif->timings[1] = value;
843 pmif->timings[2] = pmif->timings[3] = value2;
846 static int on_media_bay(pmac_ide_hwif_t *pmif)
848 return pmif->mdev && pmif->mdev->media_bay != NULL;
854 static int pmac_ide_do_suspend(pmac_ide_hwif_t *pmif)
857 pmif->timings[0] = 0;
858 pmif->timings[1] = 0;
860 disable_irq(pmif->irq);
863 if (on_media_bay(pmif))
867 if (pmif->kauai_fcr) {
868 u32 fcr = readl(pmif->kauai_fcr);
870 writel(fcr, pmif->kauai_fcr);
874 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id,
883 static int pmac_ide_do_resume(pmac_ide_hwif_t *pmif)
886 if (!on_media_bay(pmif)) {
887 ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 1);
888 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id, 1);
890 ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 0);
893 if (pmif->kauai_fcr) {
894 u32 fcr = readl(pmif->kauai_fcr);
896 writel(fcr, pmif->kauai_fcr);
903 sanitize_timings(pmif);
905 enable_irq(pmif->irq);
912 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
913 struct device_node *np = pmif->node;
944 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
946 if (on_media_bay(pmif)) {
947 if (check_media_bay(pmif->mdev->media_bay) == MB_CD) {
1017 static int pmac_ide_setup_device(pmac_ide_hwif_t *pmif, struct ide_hw *hw)
1019 struct device_node *np = pmif->node;
1026 pmif->broken_dma = pmif->broken_dma_warn = 0;
1028 pmif->kind = controller_sh_ata6;
1033 pmif->kind = controller_un_ata6;
1038 pmif->kind = controller_k2_ata6;
1044 pmif->kind = controller_kl_ata4;
1048 pmif->kind = controller_kl_ata3;
1050 pmif->kind = controller_heathrow;
1052 pmif->kind = controller_ohare;
1053 pmif->broken_dma = 1;
1057 pmif->aapl_bus_id = bidp ? *bidp : 0;
1060 if (pmif->kauai_fcr)
1063 KAUAI_FCR_UATA_ENABLE, pmif->kauai_fcr);
1066 sanitize_timings(pmif);
1069 if (pmif->mdev)
1070 lock_media_bay(pmif->mdev->media_bay);
1077 pmif->hwif = host->ports[0];
1079 if (on_media_bay(pmif)) {
1082 pmif->aapl_bus_id = 1;
1083 } else if (pmif->kind == controller_ohare) {
1091 ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 1);
1092 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, pmif->aapl_bus_id, 1);
1094 ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 0);
1099 "bus ID %d%s, irq %d\n", model_name[pmif->kind],
1100 pmif->mdev ? "macio" : "PCI", pmif->aapl_bus_id,
1101 on_media_bay(pmif) ? " (mediabay)" : "", hw->irq);
1105 pmif->hwif = NULL;
1107 if (pmif->mdev)
1108 unlock_media_bay(pmif->mdev->media_bay);
1134 pmac_ide_hwif_t *pmif;
1138 pmif = kzalloc(sizeof(*pmif), GFP_KERNEL);
1139 if (pmif == NULL)
1172 pmif->mdev = mdev;
1173 pmif->node = mdev->ofdev.dev.of_node;
1174 pmif->regbase = regbase;
1175 pmif->irq = irq;
1176 pmif->kauai_fcr = NULL;
1184 pmif->dma_regs = ioremap(macio_resource_start(mdev, 1), 0x1000);
1186 pmif->dma_regs = NULL;
1188 dev_set_drvdata(&mdev->ofdev.dev, pmif);
1191 pmac_ide_init_ports(&hw, pmif->regbase);
1196 rc = pmac_ide_setup_device(pmif, &hw);
1201 if (pmif->dma_regs) {
1202 iounmap(pmif->dma_regs);
1206 kfree(pmif);
1212 kfree(pmif);
1219 pmac_ide_hwif_t *pmif = dev_get_drvdata(&mdev->ofdev.dev);
1224 rc = pmac_ide_do_suspend(pmif);
1235 pmac_ide_hwif_t *pmif = dev_get_drvdata(&mdev->ofdev.dev);
1239 rc = pmac_ide_do_resume(pmif);
1254 pmac_ide_hwif_t *pmif;
1266 pmif = kzalloc(sizeof(*pmif), GFP_KERNEL);
1267 if (pmif == NULL)
1285 pmif->mdev = NULL;
1286 pmif->node = np;
1292 pmif->regbase = (unsigned long) base + 0x2000;
1293 pmif->dma_regs = base + 0x1000;
1294 pmif->kauai_fcr = base;
1295 pmif->irq = pdev->irq;
1297 pci_set_drvdata(pdev, pmif);
1300 pmac_ide_init_ports(&hw, pmif->regbase);
1304 rc = pmac_ide_setup_device(pmif, &hw);
1309 kfree(pmif);
1315 kfree(pmif);
1322 pmac_ide_hwif_t *pmif = pci_get_drvdata(pdev);
1327 rc = pmac_ide_do_suspend(pmif);
1338 pmac_ide_hwif_t *pmif = pci_get_drvdata(pdev);
1342 rc = pmac_ide_do_resume(pmif);
1353 pmac_ide_hwif_t *pmif = dev_get_drvdata(&mdev->ofdev.dev);
1357 if (!pmif->hwif->present)
1358 ide_port_scan(pmif->hwif);
1361 if (pmif->hwif->present)
1362 ide_port_unregister_devices(pmif->hwif);
1455 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
1457 volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
1463 table = (struct dbdma_cmd *) pmif->dma_table_cpu;
1479 if (pmif->broken_dma && cur_addr & (L1_CACHE_BYTES - 1)) {
1480 if (pmif->broken_dma_warn == 0) {
1483 pmif->broken_dma_warn = 1;
1532 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
1533 u8 unit = drive->dn & 1, ata4 = (pmif->kind == controller_kl_ata4);
1540 if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) {
1541 writel(pmif->timings[unit] + (write ? 0 : 0x00800000UL),
1557 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
1560 dma = pmif->dma_regs;
1574 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
1575 volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
1598 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
1599 volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
1652 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
1653 volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
1674 pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent);
1680 if (dev == NULL || pmif->dma_regs == 0)
1687 pmif->dma_table_cpu = dma_alloc_coherent(&dev->dev,
1690 if (pmif->dma_table_cpu == NULL) {