Lines Matching defs:dpll_clk
400 u8 dpll_clk; /* DPLL clock in MHz */
451 .dpll_clk = 0, /* no DPLL */
459 .dpll_clk = 48,
467 .dpll_clk = 48,
475 .dpll_clk = 48,
483 .dpll_clk = 55,
491 .dpll_clk = 66,
499 .dpll_clk = 66,
507 .dpll_clk = 66,
515 .dpll_clk = 77,
523 .dpll_clk = 77,
531 .dpll_clk = 77,
911 u8 pci_clk, dpll_clk = 0; /* PCI and DPLL clock in MHz */
995 dpll_clk = info->dpll_clk;
996 pci_clk = (f_cnt * dpll_clk) / 192;
1010 dpll_clk, f_cnt, pci_clk);
1068 dpll_clk = 66;
1070 } else if (dpll_clk) { /* HPT36x chips don't have DPLL */
1071 dpll_clk = 50;
1088 f_low = (pci_clk * 48) / dpll_clk;
1109 name, pci_name(dev), dpll_clk);
1112 dpll_clk = 0;
1119 info->dpll_clk = dpll_clk;
1211 if (chip_type >= HPT372N && info->dpll_clk && info->pci_clk < 66) {