Lines Matching refs:master
12 #include <linux/i3c/master.h>
423 to_cdns_i3c_master(struct i3c_master_controller *master)
425 return container_of(master, struct cdns_i3c_master, base);
428 static void cdns_i3c_master_wr_to_tx_fifo(struct cdns_i3c_master *master,
431 writesl(master->regs + TX_FIFO, bytes, nbytes / 4);
436 writesl(master->regs + TX_FIFO, &tmp, 1);
440 static void cdns_i3c_master_rd_from_rx_fifo(struct cdns_i3c_master *master,
443 readsl(master->regs + RX_FIFO, bytes, nbytes / 4);
447 readsl(master->regs + RX_FIFO, &tmp, 1);
493 static int cdns_i3c_master_disable(struct cdns_i3c_master *master)
497 writel(readl(master->regs + CTRL) & ~CTRL_DEV_EN, master->regs + CTRL);
499 return readl_poll_timeout(master->regs + MST_STATUS0, status,
503 static void cdns_i3c_master_enable(struct cdns_i3c_master *master)
505 writel(readl(master->regs + CTRL) | CTRL_DEV_EN, master->regs + CTRL);
509 cdns_i3c_master_alloc_xfer(struct cdns_i3c_master *master, unsigned int ncmds)
529 static void cdns_i3c_master_start_xfer_locked(struct cdns_i3c_master *master)
531 struct cdns_i3c_xfer *xfer = master->xferqueue.cur;
537 writel(MST_INT_CMDD_EMP, master->regs + MST_ICR);
541 cdns_i3c_master_wr_to_tx_fifo(master, cmd->tx_buf,
549 master->regs + CMD1_FIFO);
550 writel(cmd->cmd0, master->regs + CMD0_FIFO);
553 writel(readl(master->regs + CTRL) | CTRL_MCS,
554 master->regs + CTRL);
555 writel(MST_INT_CMDD_EMP, master->regs + MST_IER);
558 static void cdns_i3c_master_end_xfer_locked(struct cdns_i3c_master *master,
561 struct cdns_i3c_xfer *xfer = master->xferqueue.cur;
571 writel(MST_INT_CMDD_EMP, master->regs + MST_IDR);
573 for (status0 = readl(master->regs + MST_STATUS0);
575 status0 = readl(master->regs + MST_STATUS0)) {
579 cmdr = readl(master->regs + CMDR);
588 cdns_i3c_master_rd_from_rx_fifo(master, cmd->rx_buf, rx_len);
623 xfer = list_first_entry_or_null(&master->xferqueue.list,
628 master->xferqueue.cur = xfer;
629 cdns_i3c_master_start_xfer_locked(master);
632 static void cdns_i3c_master_queue_xfer(struct cdns_i3c_master *master,
638 spin_lock_irqsave(&master->xferqueue.lock, flags);
639 if (master->xferqueue.cur) {
640 list_add_tail(&xfer->node, &master->xferqueue.list);
642 master->xferqueue.cur = xfer;
643 cdns_i3c_master_start_xfer_locked(master);
645 spin_unlock_irqrestore(&master->xferqueue.lock, flags);
648 static void cdns_i3c_master_unqueue_xfer(struct cdns_i3c_master *master,
653 spin_lock_irqsave(&master->xferqueue.lock, flags);
654 if (master->xferqueue.cur == xfer) {
657 writel(readl(master->regs + CTRL) & ~CTRL_DEV_EN,
658 master->regs + CTRL);
659 readl_poll_timeout_atomic(master->regs + MST_STATUS0, status,
662 master->xferqueue.cur = NULL;
665 master->regs + FLUSH_CTRL);
666 writel(MST_INT_CMDD_EMP, master->regs + MST_IDR);
667 writel(readl(master->regs + CTRL) | CTRL_DEV_EN,
668 master->regs + CTRL);
672 spin_unlock_irqrestore(&master->xferqueue.lock, flags);
698 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
703 xfer = cdns_i3c_master_alloc_xfer(master, 1);
724 cdns_i3c_master_queue_xfer(master, xfer);
726 cdns_i3c_master_unqueue_xfer(master, xfer);
740 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
752 if (nxfers > master->caps.cmdfifodepth ||
753 nxfers > master->caps.cmdrfifodepth)
767 if (rxslots > master->caps.rxfifodepth ||
768 txslots > master->caps.txfifodepth)
771 cdns_xfer = cdns_i3c_master_alloc_xfer(master, nxfers);
801 cdns_i3c_master_queue_xfer(master, cdns_xfer);
804 cdns_i3c_master_unqueue_xfer(master, cdns_xfer);
820 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
825 if (nxfers > master->caps.cmdfifodepth)
838 if (ntxwords > master->caps.txfifodepth ||
839 nrxwords > master->caps.rxfifodepth)
842 xfer = cdns_i3c_master_alloc_xfer(master, nxfers);
866 cdns_i3c_master_queue_xfer(master, xfer);
868 cdns_i3c_master_unqueue_xfer(master, xfer);
902 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
909 writel(DEV_ID_RR0_IS_I3C | rr, master->regs + DEV_ID_RR0(data->id));
912 static int cdns_i3c_master_get_rr_slot(struct cdns_i3c_master *master,
920 if (!master->free_rr_slots)
923 return ffs(master->free_rr_slots) - 1;
926 activedevs = readl(master->regs + DEVS_CTRL) & DEVS_CTRL_DEVS_ACTIVE_MASK;
929 for_each_set_bit(i, &activedevs, master->maxdevs + 1) {
930 rr = readl(master->regs + DEV_ID_RR0(i));
952 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
960 slot = cdns_i3c_master_get_rr_slot(master, dev->info.dyn_addr);
969 master->free_rr_slots &= ~BIT(slot);
973 writel(readl(master->regs + DEVS_CTRL) |
975 master->regs + DEVS_CTRL);
984 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
987 writel(readl(master->regs + DEVS_CTRL) |
989 master->regs + DEVS_CTRL);
992 master->free_rr_slots |= BIT(data->id);
999 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1003 slot = cdns_i3c_master_get_rr_slot(master, 0);
1012 master->free_rr_slots &= ~BIT(slot);
1016 master->regs + DEV_ID_RR0(data->id));
1017 writel(dev->lvr, master->regs + DEV_ID_RR2(data->id));
1018 writel(readl(master->regs + DEVS_CTRL) |
1020 master->regs + DEVS_CTRL);
1028 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1031 writel(readl(master->regs + DEVS_CTRL) |
1033 master->regs + DEVS_CTRL);
1034 master->free_rr_slots |= BIT(data->id);
1042 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1044 cdns_i3c_master_disable(master);
1047 static void cdns_i3c_master_dev_rr_to_info(struct cdns_i3c_master *master,
1054 rr = readl(master->regs + DEV_ID_RR0(slot));
1056 rr = readl(master->regs + DEV_ID_RR2(slot));
1060 info->pid |= (u64)readl(master->regs + DEV_ID_RR1(slot)) << 16;
1063 static void cdns_i3c_master_upd_i3c_scl_lim(struct cdns_i3c_master *master)
1065 struct i3c_master_controller *m = &master->base;
1102 if (new_i3c_scl_lim == master->i3c_scl_lim)
1104 master->i3c_scl_lim = new_i3c_scl_lim;
1110 prescl1 = readl(master->regs + PRESCL_CTRL1) &
1112 ctrl = readl(master->regs + CTRL);
1114 i3c_lim_period = DIV_ROUND_UP(1000000000, master->i3c_scl_lim);
1123 /* Disable I3C master before updating PRESCL_CTRL1. */
1125 cdns_i3c_master_disable(master);
1127 writel(prescl1, master->regs + PRESCL_CTRL1);
1130 cdns_i3c_master_enable(master);
1135 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1141 olddevs = readl(master->regs + DEVS_CTRL) & DEVS_CTRL_DEVS_ACTIVE_MASK;
1145 for_each_clear_bit(slot, &olddevs, master->maxdevs + 1) {
1153 master->regs + DEV_ID_RR0(slot));
1154 writel(0, master->regs + DEV_ID_RR1(slot));
1155 writel(0, master->regs + DEV_ID_RR2(slot));
1158 ret = i3c_master_entdaa_locked(&master->base);
1162 newdevs = readl(master->regs + DEVS_CTRL) & DEVS_CTRL_DEVS_ACTIVE_MASK;
1169 for_each_set_bit(slot, &newdevs, master->maxdevs + 1)
1178 writel(readl(master->regs + DEVS_CTRL) |
1179 master->free_rr_slots << DEVS_CTRL_DEV_CLR_SHIFT,
1180 master->regs + DEVS_CTRL);
1182 i3c_master_defslvs_locked(&master->base);
1184 cdns_i3c_master_upd_i3c_scl_lim(master);
1193 static u8 cdns_i3c_master_calculate_thd_delay(struct cdns_i3c_master *master)
1195 unsigned long sysclk_rate = clk_get_rate(master->sysclk);
1196 u8 thd_delay = DIV_ROUND_UP(master->devdata->thd_delay_ns,
1209 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1233 sysclk_rate = clk_get_rate(master->sysclk);
1257 writel(prescl0, master->regs + PRESCL_CTRL0);
1265 writel(prescl1, master->regs + PRESCL_CTRL1);
1267 /* Get an address for the master. */
1273 master->regs + DEV_ID_RR0(0));
1275 cdns_i3c_master_dev_rr_to_info(master, 0, &info);
1279 ret = i3c_master_set_info(&master->base, &info);
1295 * master output. This setting allows to meet this timing on master's
1298 ctrl |= CTRL_THD_DELAY(cdns_i3c_master_calculate_thd_delay(master));
1299 writel(ctrl, master->regs + CTRL);
1301 cdns_i3c_master_enable(master);
1306 static void cdns_i3c_master_handle_ibi(struct cdns_i3c_master *master,
1321 if (id >= master->ibi.num_slots || (ibir & IBIR_ERROR))
1324 dev = master->ibi.slots[id];
1325 spin_lock(&master->ibi.lock);
1335 readsl(master->regs + IBI_DATA_FIFO, buf, nbytes / 4);
1337 u32 tmp = __raw_readl(master->regs + IBI_DATA_FIFO);
1348 spin_unlock(&master->ibi.lock);
1356 readl(master->regs + IBI_DATA_FIFO);
1360 static void cnds_i3c_master_demux_ibis(struct cdns_i3c_master *master)
1364 writel(MST_INT_IBIR_THR, master->regs + MST_ICR);
1366 for (status0 = readl(master->regs + MST_STATUS0);
1368 status0 = readl(master->regs + MST_STATUS0)) {
1369 u32 ibir = readl(master->regs + IBIR);
1373 cdns_i3c_master_handle_ibi(master, ibir);
1378 queue_work(master->base.wq, &master->hj_work);
1391 struct cdns_i3c_master *master = data;
1394 status = readl(master->regs + MST_ISR);
1395 if (!(status & readl(master->regs + MST_IMR)))
1398 spin_lock(&master->xferqueue.lock);
1399 cdns_i3c_master_end_xfer_locked(master, status);
1400 spin_unlock(&master->xferqueue.lock);
1403 cnds_i3c_master_demux_ibis(master);
1411 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1422 spin_lock_irqsave(&master->ibi.lock, flags);
1423 sirmap = readl(master->regs + SIR_MAP_DEV_REG(data->ibi));
1427 writel(sirmap, master->regs + SIR_MAP_DEV_REG(data->ibi));
1428 spin_unlock_irqrestore(&master->ibi.lock, flags);
1436 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1442 spin_lock_irqsave(&master->ibi.lock, flags);
1443 sirmap = readl(master->regs + SIR_MAP_DEV_REG(data->ibi));
1454 writel(sirmap, master->regs + SIR_MAP_DEV_REG(data->ibi));
1455 spin_unlock_irqrestore(&master->ibi.lock, flags);
1460 spin_lock_irqsave(&master->ibi.lock, flags);
1461 sirmap = readl(master->regs + SIR_MAP_DEV_REG(data->ibi));
1465 writel(sirmap, master->regs + SIR_MAP_DEV_REG(data->ibi));
1466 spin_unlock_irqrestore(&master->ibi.lock, flags);
1476 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1485 spin_lock_irqsave(&master->ibi.lock, flags);
1486 for (i = 0; i < master->ibi.num_slots; i++) {
1487 if (!master->ibi.slots[i]) {
1489 master->ibi.slots[i] = dev;
1493 spin_unlock_irqrestore(&master->ibi.lock, flags);
1495 if (i < master->ibi.num_slots)
1507 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1511 spin_lock_irqsave(&master->ibi.lock, flags);
1512 master->ibi.slots[data->ibi] = NULL;
1514 spin_unlock_irqrestore(&master->ibi.lock, flags);
1549 struct cdns_i3c_master *master = container_of(work,
1553 i3c_master_do_daa(&master->base);
1561 { .compatible = "cdns,i3c-master", .data = &cdns_i3c_devdata },
1567 struct cdns_i3c_master *master;
1571 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
1572 if (!master)
1575 master->devdata = of_device_get_match_data(&pdev->dev);
1576 if (!master->devdata)
1579 master->regs = devm_platform_ioremap_resource(pdev, 0);
1580 if (IS_ERR(master->regs))
1581 return PTR_ERR(master->regs);
1583 master->pclk = devm_clk_get(&pdev->dev, "pclk");
1584 if (IS_ERR(master->pclk))
1585 return PTR_ERR(master->pclk);
1587 master->sysclk = devm_clk_get(&pdev->dev, "sysclk");
1588 if (IS_ERR(master->sysclk))
1589 return PTR_ERR(master->sysclk);
1595 ret = clk_prepare_enable(master->pclk);
1599 ret = clk_prepare_enable(master->sysclk);
1603 if (readl(master->regs + DEV_ID) != DEV_ID_I3C_MASTER) {
1608 spin_lock_init(&master->xferqueue.lock);
1609 INIT_LIST_HEAD(&master->xferqueue.list);
1611 INIT_WORK(&master->hj_work, cdns_i3c_master_hj);
1612 writel(0xffffffff, master->regs + MST_IDR);
1613 writel(0xffffffff, master->regs + SLV_IDR);
1615 dev_name(&pdev->dev), master);
1619 platform_set_drvdata(pdev, master);
1621 val = readl(master->regs + CONF_STATUS0);
1623 /* Device ID0 is reserved to describe this master. */
1624 master->maxdevs = CONF_STATUS0_DEVS_NUM(val);
1625 master->free_rr_slots = GENMASK(master->maxdevs, 1);
1626 master->caps.ibirfifodepth = CONF_STATUS0_IBIR_DEPTH(val);
1627 master->caps.cmdrfifodepth = CONF_STATUS0_CMDR_DEPTH(val);
1629 val = readl(master->regs + CONF_STATUS1);
1630 master->caps.cmdfifodepth = CONF_STATUS1_CMD_DEPTH(val);
1631 master->caps.rxfifodepth = CONF_STATUS1_RX_DEPTH(val);
1632 master->caps.txfifodepth = CONF_STATUS1_TX_DEPTH(val);
1634 spin_lock_init(&master->ibi.lock);
1635 master->ibi.num_slots = CONF_STATUS1_IBI_HW_RES(val);
1636 master->ibi.slots = devm_kcalloc(&pdev->dev, master->ibi.num_slots,
1637 sizeof(*master->ibi.slots),
1639 if (!master->ibi.slots) {
1644 writel(IBIR_THR(1), master->regs + CMD_IBI_THR_CTRL);
1645 writel(MST_INT_IBIR_THR, master->regs + MST_IER);
1646 writel(DEVS_CTRL_DEV_CLR_ALL, master->regs + DEVS_CTRL);
1648 ret = i3c_master_register(&master->base, &pdev->dev,
1656 clk_disable_unprepare(master->sysclk);
1659 clk_disable_unprepare(master->pclk);
1666 struct cdns_i3c_master *master = platform_get_drvdata(pdev);
1669 ret = i3c_master_unregister(&master->base);
1673 clk_disable_unprepare(master->sysclk);
1674 clk_disable_unprepare(master->pclk);
1683 .name = "cdns-i3c-master",
1690 MODULE_DESCRIPTION("Cadence I3C master driver");
1692 MODULE_ALIAS("platform:cdns-i3c-master");