Lines Matching refs:xfer
360 struct dw_i3c_xfer *xfer;
362 xfer = kzalloc(struct_size(xfer, cmds, ncmds), GFP_KERNEL);
363 if (!xfer)
366 INIT_LIST_HEAD(&xfer->node);
367 xfer->ncmds = ncmds;
368 xfer->ret = -ETIMEDOUT;
370 return xfer;
373 static void dw_i3c_master_free_xfer(struct dw_i3c_xfer *xfer)
375 kfree(xfer);
380 struct dw_i3c_xfer *xfer = master->xferqueue.cur;
384 if (!xfer)
387 for (i = 0; i < xfer->ncmds; i++) {
388 struct dw_i3c_cmd *cmd = &xfer->cmds[i];
395 thld_ctrl |= QUEUE_THLD_CTRL_RESP_BUF(xfer->ncmds);
398 for (i = 0; i < xfer->ncmds; i++) {
399 struct dw_i3c_cmd *cmd = &xfer->cmds[i];
407 struct dw_i3c_xfer *xfer)
411 init_completion(&xfer->comp);
414 list_add_tail(&xfer->node, &master->xferqueue.list);
416 master->xferqueue.cur = xfer;
423 struct dw_i3c_xfer *xfer)
425 if (master->xferqueue.cur == xfer) {
437 list_del_init(&xfer->node);
442 struct dw_i3c_xfer *xfer)
447 dw_i3c_master_dequeue_xfer_locked(master, xfer);
453 struct dw_i3c_xfer *xfer = master->xferqueue.cur;
457 if (!xfer)
469 cmd = &xfer->cmds[RESPONSE_PORT_TID(resp)];
478 switch (xfer->cmds[i].error) {
499 xfer->ret = ret;
500 complete(&xfer->comp);
503 dw_i3c_master_dequeue_xfer_locked(master, xfer);
508 xfer = list_first_entry_or_null(&master->xferqueue.list,
511 if (xfer)
512 list_del_init(&xfer->node);
514 master->xferqueue.cur = xfer;
664 struct dw_i3c_xfer *xfer;
674 xfer = dw_i3c_master_alloc_xfer(master, 1);
675 if (!xfer)
678 cmd = xfer->cmds;
691 dw_i3c_master_enqueue_xfer(master, xfer);
692 if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
693 dw_i3c_master_dequeue_xfer(master, xfer);
695 ret = xfer->ret;
696 if (xfer->cmds[0].error == RESPONSE_ERROR_IBA_NACK)
699 dw_i3c_master_free_xfer(xfer);
706 struct dw_i3c_xfer *xfer;
714 xfer = dw_i3c_master_alloc_xfer(master, 1);
715 if (!xfer)
718 cmd = xfer->cmds;
732 dw_i3c_master_enqueue_xfer(master, xfer);
733 if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
734 dw_i3c_master_dequeue_xfer(master, xfer);
736 ret = xfer->ret;
737 if (xfer->cmds[0].error == RESPONSE_ERROR_IBA_NACK)
739 dw_i3c_master_free_xfer(xfer);
764 struct dw_i3c_xfer *xfer;
791 xfer = dw_i3c_master_alloc_xfer(master, 1);
792 if (!xfer)
796 cmd = &xfer->cmds[0];
805 dw_i3c_master_enqueue_xfer(master, xfer);
806 if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
807 dw_i3c_master_dequeue_xfer(master, xfer);
817 dw_i3c_master_free_xfer(xfer);
835 struct dw_i3c_xfer *xfer;
855 xfer = dw_i3c_master_alloc_xfer(master, i3c_nxfers);
856 if (!xfer)
860 struct dw_i3c_cmd *cmd = &xfer->cmds[i];
886 dw_i3c_master_enqueue_xfer(master, xfer);
887 if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
888 dw_i3c_master_dequeue_xfer(master, xfer);
890 ret = xfer->ret;
891 dw_i3c_master_free_xfer(xfer);
979 struct dw_i3c_xfer *xfer;
999 xfer = dw_i3c_master_alloc_xfer(master, i2c_nxfers);
1000 if (!xfer)
1004 struct dw_i3c_cmd *cmd = &xfer->cmds[i];
1026 dw_i3c_master_enqueue_xfer(master, xfer);
1027 if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
1028 dw_i3c_master_dequeue_xfer(master, xfer);
1030 ret = xfer->ret;
1031 dw_i3c_master_free_xfer(xfer);