Lines Matching refs:priv
152 static void rcar_i2c_write(struct rcar_i2c_priv *priv, int reg, u32 val)
154 writel(val, priv->io + reg);
157 static u32 rcar_i2c_read(struct rcar_i2c_priv *priv, int reg)
159 return readl(priv->io + reg);
164 struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
166 return !!(rcar_i2c_read(priv, ICMCR) & FSCL);
172 struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
175 priv->recovery_icmcr |= FSCL;
177 priv->recovery_icmcr &= ~FSCL;
179 rcar_i2c_write(priv, ICMCR, priv->recovery_icmcr);
184 struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
187 priv->recovery_icmcr |= FSDA;
189 priv->recovery_icmcr &= ~FSDA;
191 rcar_i2c_write(priv, ICMCR, priv->recovery_icmcr);
196 struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
198 return !(rcar_i2c_read(priv, ICMCR) & FSDA);
209 static void rcar_i2c_init(struct rcar_i2c_priv *priv)
212 rcar_i2c_write(priv, ICMIER, 0);
213 rcar_i2c_write(priv, ICMCR, MDBS);
214 rcar_i2c_write(priv, ICMSR, 0);
216 rcar_i2c_write(priv, ICCCR, priv->icccr);
218 if (priv->devtype == I2C_RCAR_GEN3)
219 rcar_i2c_write(priv, ICFBSCR, TCYC17);
223 static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
228 ret = readl_poll_timeout(priv->io + ICMCR, val, !(val & FSDA), 10,
229 priv->adap.timeout);
232 priv->recovery_icmcr = MDBS | OBPC | FSDA | FSCL;
233 ret = i2c_recover_bus(&priv->adap);
239 static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv)
243 struct device *dev = rcar_i2c_priv_to_dev(priv);
254 switch (priv->devtype) {
282 rate = clk_get_rate(priv->clk);
327 priv->icccr = scgd << cdf_width | cdf;
332 static void rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
334 int read = !!rcar_i2c_is_recv(priv);
336 priv->pos = 0;
337 if (priv->msgs_left == 1)
338 priv->flags |= ID_LAST_MSG;
340 rcar_i2c_write(priv, ICMAR, i2c_8bit_addr_from_msg(priv->msg));
346 if (priv->flags & ID_FIRST_MSG) {
347 rcar_i2c_write(priv, ICMSR, 0);
348 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
350 if (priv->flags & ID_P_REP_AFTER_RD)
351 priv->flags &= ~ID_P_REP_AFTER_RD;
353 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
354 rcar_i2c_write(priv, ICMSR, 0);
356 rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);
359 static void rcar_i2c_next_msg(struct rcar_i2c_priv *priv)
361 priv->msg++;
362 priv->msgs_left--;
363 priv->flags &= ID_P_MASK;
364 rcar_i2c_prepare_msg(priv);
367 static void rcar_i2c_dma_unmap(struct rcar_i2c_priv *priv)
369 struct dma_chan *chan = priv->dma_direction == DMA_FROM_DEVICE
370 ? priv->dma_rx : priv->dma_tx;
372 dma_unmap_single(chan->device->dev, sg_dma_address(&priv->sg),
373 sg_dma_len(&priv->sg), priv->dma_direction);
376 if (priv->devtype == I2C_RCAR_GEN3 &&
377 priv->dma_direction == DMA_FROM_DEVICE)
378 priv->flags |= ID_P_NO_RXDMA;
380 priv->dma_direction = DMA_NONE;
383 rcar_i2c_write(priv, ICDMAER, 0);
386 static void rcar_i2c_cleanup_dma(struct rcar_i2c_priv *priv)
388 if (priv->dma_direction == DMA_NONE)
390 else if (priv->dma_direction == DMA_FROM_DEVICE)
391 dmaengine_terminate_all(priv->dma_rx);
392 else if (priv->dma_direction == DMA_TO_DEVICE)
393 dmaengine_terminate_all(priv->dma_tx);
395 rcar_i2c_dma_unmap(priv);
400 struct rcar_i2c_priv *priv = data;
402 priv->pos += sg_dma_len(&priv->sg);
404 rcar_i2c_dma_unmap(priv);
407 static bool rcar_i2c_dma(struct rcar_i2c_priv *priv)
409 struct device *dev = rcar_i2c_priv_to_dev(priv);
410 struct i2c_msg *msg = priv->msg;
413 struct dma_chan *chan = read ? priv->dma_rx : priv->dma_tx;
422 !(msg->flags & I2C_M_DMA_SAFE) || (read && priv->flags & ID_P_NO_RXDMA))
430 buf = priv->msg->buf;
431 len = priv->msg->len - 2;
436 buf = priv->msg->buf + 1;
437 len = priv->msg->len - 1;
446 sg_dma_len(&priv->sg) = len;
447 sg_dma_address(&priv->sg) = dma_addr;
449 priv->dma_direction = dir;
451 txdesc = dmaengine_prep_slave_sg(chan, &priv->sg, 1,
456 rcar_i2c_cleanup_dma(priv);
461 txdesc->callback_param = priv;
466 rcar_i2c_cleanup_dma(priv);
472 rcar_i2c_write(priv, ICDMAER, RMDMAE);
474 rcar_i2c_write(priv, ICDMAER, TMDMAE);
480 static void rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
482 struct i2c_msg *msg = priv->msg;
489 if (priv->pos == 1 && rcar_i2c_dma(priv))
492 if (priv->pos < msg->len) {
500 rcar_i2c_write(priv, ICRXTX, msg->buf[priv->pos]);
501 priv->pos++;
511 if (priv->flags & ID_LAST_MSG) {
517 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
519 rcar_i2c_next_msg(priv);
524 rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_SEND);
527 static void rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
529 struct i2c_msg *msg = priv->msg;
540 rcar_i2c_dma(priv);
541 } else if (priv->pos < msg->len) {
543 msg->buf[priv->pos] = rcar_i2c_read(priv, ICRXTX);
544 priv->pos++;
548 if (priv->pos + 1 == msg->len) {
549 if (priv->flags & ID_LAST_MSG) {
550 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
552 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
553 priv->flags |= ID_P_REP_AFTER_RD;
557 if (priv->pos == msg->len && !(priv->flags & ID_LAST_MSG))
558 rcar_i2c_next_msg(priv);
560 rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV);
563 static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv)
568 ssr_raw = rcar_i2c_read(priv, ICSSR) & 0xff;
569 ssr_filtered = ssr_raw & rcar_i2c_read(priv, ICSIER);
578 i2c_slave_event(priv->slave, I2C_SLAVE_READ_REQUESTED, &value);
579 rcar_i2c_write(priv, ICRXTX, value);
580 rcar_i2c_write(priv, ICSIER, SDE | SSR | SAR);
582 i2c_slave_event(priv->slave, I2C_SLAVE_WRITE_REQUESTED, &value);
583 rcar_i2c_read(priv, ICRXTX); /* dummy read */
584 rcar_i2c_write(priv, ICSIER, SDR | SSR | SAR);
588 rcar_i2c_write(priv, ICSSR, ~(SAR | SSR) & 0xff);
593 i2c_slave_event(priv->slave, I2C_SLAVE_STOP, &value);
594 rcar_i2c_write(priv, ICSCR, SIE | SDBS); /* clear our NACK */
595 rcar_i2c_write(priv, ICSIER, SAR);
596 rcar_i2c_write(priv, ICSSR, ~SSR & 0xff);
603 value = rcar_i2c_read(priv, ICRXTX);
604 ret = i2c_slave_event(priv->slave, I2C_SLAVE_WRITE_RECEIVED, &value);
606 rcar_i2c_write(priv, ICSCR, SIE | SDBS | (ret < 0 ? FNA : 0));
607 rcar_i2c_write(priv, ICSSR, ~SDR & 0xff);
612 i2c_slave_event(priv->slave, I2C_SLAVE_READ_PROCESSED, &value);
613 rcar_i2c_write(priv, ICRXTX, value);
614 rcar_i2c_write(priv, ICSSR, ~SDE & 0xff);
631 static irqreturn_t rcar_i2c_irq(int irq, struct rcar_i2c_priv *priv, u32 msr)
634 if (rcar_i2c_slave_irq(priv))
642 priv->flags |= ID_DONE | ID_ARBLOST;
649 rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP);
650 priv->flags |= ID_NACK;
656 priv->msgs_left--; /* The last message also made it */
657 priv->flags |= ID_DONE;
661 if (rcar_i2c_is_recv(priv))
662 rcar_i2c_irq_recv(priv, msr);
664 rcar_i2c_irq_send(priv, msr);
667 if (priv->flags & ID_DONE) {
668 rcar_i2c_write(priv, ICMIER, 0);
669 rcar_i2c_write(priv, ICMSR, 0);
670 wake_up(&priv->wait);
678 struct rcar_i2c_priv *priv = ptr;
682 if (likely(!(priv->flags & ID_P_REP_AFTER_RD)))
683 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
686 msr = rcar_i2c_read(priv, ICMSR);
687 msr &= rcar_i2c_read(priv, ICMIER);
689 return rcar_i2c_irq(irq, priv, msr);
694 struct rcar_i2c_priv *priv = ptr;
698 msr = rcar_i2c_read(priv, ICMSR);
699 msr &= rcar_i2c_read(priv, ICMIER);
705 if (likely(!(priv->flags & ID_P_REP_AFTER_RD) && msr))
706 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
708 return rcar_i2c_irq(irq, priv, msr);
749 static void rcar_i2c_request_dma(struct rcar_i2c_priv *priv,
752 struct device *dev = rcar_i2c_priv_to_dev(priv);
759 chan = read ? priv->dma_rx : priv->dma_tx;
764 chan = rcar_i2c_request_dma_chan(dev, dir, priv->res->start + ICRXTX);
767 priv->dma_rx = chan;
769 priv->dma_tx = chan;
772 static void rcar_i2c_release_dma(struct rcar_i2c_priv *priv)
774 if (!IS_ERR(priv->dma_tx)) {
775 dma_release_channel(priv->dma_tx);
776 priv->dma_tx = ERR_PTR(-EPROBE_DEFER);
779 if (!IS_ERR(priv->dma_rx)) {
780 dma_release_channel(priv->dma_rx);
781 priv->dma_rx = ERR_PTR(-EPROBE_DEFER);
786 static int rcar_i2c_do_reset(struct rcar_i2c_priv *priv)
790 ret = reset_control_reset(priv->rstc);
795 100, false, priv->rstc);
802 struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
803 struct device *dev = rcar_i2c_priv_to_dev(priv);
810 ret = rcar_i2c_bus_barrier(priv);
815 if (priv->devtype == I2C_RCAR_GEN3) {
816 priv->flags |= ID_P_NO_RXDMA;
817 if (!IS_ERR(priv->rstc)) {
818 ret = rcar_i2c_do_reset(priv);
820 priv->flags &= ~ID_P_NO_RXDMA;
824 rcar_i2c_init(priv);
827 rcar_i2c_request_dma(priv, msgs + i);
830 priv->msg = msgs;
831 priv->msgs_left = num;
832 priv->flags = (priv->flags & ID_P_MASK) | ID_FIRST_MSG;
833 rcar_i2c_prepare_msg(priv);
835 time_left = wait_event_timeout(priv->wait, priv->flags & ID_DONE,
839 if (priv->dma_direction != DMA_NONE)
840 rcar_i2c_cleanup_dma(priv);
843 rcar_i2c_init(priv);
845 } else if (priv->flags & ID_NACK) {
847 } else if (priv->flags & ID_ARBLOST) {
850 ret = num - priv->msgs_left; /* The number of transfer */
856 dev_err(dev, "error %d : %x\n", ret, priv->flags);
863 struct rcar_i2c_priv *priv = i2c_get_adapdata(slave->adapter);
865 if (priv->slave)
872 pm_runtime_get_sync(rcar_i2c_priv_to_dev(priv));
874 priv->slave = slave;
875 rcar_i2c_write(priv, ICSAR, slave->addr);
876 rcar_i2c_write(priv, ICSSR, 0);
877 rcar_i2c_write(priv, ICSIER, SAR);
878 rcar_i2c_write(priv, ICSCR, SIE | SDBS);
885 struct rcar_i2c_priv *priv = i2c_get_adapdata(slave->adapter);
887 WARN_ON(!priv->slave);
890 disable_irq(priv->irq);
891 rcar_i2c_write(priv, ICSIER, 0);
892 rcar_i2c_write(priv, ICSSR, 0);
893 enable_irq(priv->irq);
894 rcar_i2c_write(priv, ICSCR, SDBS);
895 rcar_i2c_write(priv, ICSAR, 0); /* Gen2: must be 0 if not using slave */
897 priv->slave = NULL;
899 pm_runtime_put(rcar_i2c_priv_to_dev(priv));
906 struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
917 if (priv->flags & ID_P_HOST_NOTIFY)
954 struct rcar_i2c_priv *priv;
964 priv = devm_kzalloc(dev, sizeof(struct rcar_i2c_priv), GFP_KERNEL);
965 if (!priv)
968 priv->clk = devm_clk_get(dev, NULL);
969 if (IS_ERR(priv->clk)) {
971 return PTR_ERR(priv->clk);
974 priv->io = devm_platform_get_and_ioremap_resource(pdev, 0, &priv->res);
975 if (IS_ERR(priv->io))
976 return PTR_ERR(priv->io);
978 priv->devtype = (enum rcar_i2c_type)of_device_get_match_data(dev);
979 init_waitqueue_head(&priv->wait);
981 adap = &priv->adap;
990 i2c_set_adapdata(adap, priv);
994 sg_init_table(&priv->sg, 1);
995 priv->dma_direction = DMA_NONE;
996 priv->dma_rx = priv->dma_tx = ERR_PTR(-EPROBE_DEFER);
1001 ret = rcar_i2c_clock_calculate(priv);
1007 rcar_i2c_write(priv, ICSAR, 0); /* Gen2: must be 0 if not using slave */
1009 if (priv->devtype < I2C_RCAR_GEN3) {
1014 if (priv->devtype == I2C_RCAR_GEN3) {
1015 priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
1016 if (!IS_ERR(priv->rstc)) {
1017 ret = reset_control_status(priv->rstc);
1019 priv->rstc = ERR_PTR(-ENOTSUPP);
1025 priv->flags |= ID_P_PM_BLOCKED;
1030 priv->flags |= ID_P_HOST_NOTIFY;
1035 priv->irq = ret;
1036 ret = devm_request_irq(dev, priv->irq, irqhandler, irqflags, dev_name(dev), priv);
1038 dev_err(dev, "cannot get irq %d\n", priv->irq);
1042 platform_set_drvdata(pdev, priv);
1048 if (priv->flags & ID_P_HOST_NOTIFY) {
1049 priv->host_notify_client = i2c_new_slave_host_notify_device(adap);
1050 if (IS_ERR(priv->host_notify_client)) {
1051 ret = PTR_ERR(priv->host_notify_client);
1061 i2c_del_adapter(&priv->adap);
1063 if (priv->flags & ID_P_PM_BLOCKED)
1072 struct rcar_i2c_priv *priv = platform_get_drvdata(pdev);
1075 if (priv->host_notify_client)
1076 i2c_free_slave_host_notify_device(priv->host_notify_client);
1077 i2c_del_adapter(&priv->adap);
1078 rcar_i2c_release_dma(priv);
1079 if (priv->flags & ID_P_PM_BLOCKED)
1089 struct rcar_i2c_priv *priv = dev_get_drvdata(dev);
1091 i2c_mark_adapter_suspended(&priv->adap);
1097 struct rcar_i2c_priv *priv = dev_get_drvdata(dev);
1099 i2c_mark_adapter_resumed(&priv->adap);