Lines Matching defs:ICMCR
35 #define ICMCR 0x04 /* master ctrl */
53 /* ICMCR */
166 return !!(rcar_i2c_read(priv, ICMCR) & FSCL);
179 rcar_i2c_write(priv, ICMCR, priv->recovery_icmcr);
191 rcar_i2c_write(priv, ICMCR, priv->recovery_icmcr);
198 return !(rcar_i2c_read(priv, ICMCR) & FSDA);
213 rcar_i2c_write(priv, ICMCR, MDBS);
228 ret = readl_poll_timeout(priv->io + ICMCR, val, !(val & FSDA), 10,
343 * of ICMSR and ICMCR depends on whether we issue START or REP_START. Since
348 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
353 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
517 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
550 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
552 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
683 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
706 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);