Lines Matching refs:se
15 #include <linux/qcom-geni-se.h>
76 struct geni_se se;
157 writel_relaxed(0, gi2c->se.base + SE_GENI_CLK_SEL);
160 writel_relaxed(val, gi2c->se.base + GENI_SER_M_CLK_CFG);
165 writel_relaxed(val, gi2c->se.base + SE_I2C_SCL_COUNTERS);
170 u32 m_cmd = readl_relaxed(gi2c->se.base + SE_GENI_M_CMD0);
171 u32 m_stat = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS);
172 u32 geni_s = readl_relaxed(gi2c->se.base + SE_GENI_STATUS);
173 u32 geni_ios = readl_relaxed(gi2c->se.base + SE_GENI_IOS);
174 u32 dma = readl_relaxed(gi2c->se.base + SE_GENI_DMA_MODE_EN);
178 rx_st = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT);
179 tx_st = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT);
181 rx_st = readl_relaxed(gi2c->se.base + SE_GENI_RX_FIFO_STATUS);
182 tx_st = readl_relaxed(gi2c->se.base + SE_GENI_TX_FIFO_STATUS);
184 dev_dbg(gi2c->se.dev, "DMA:%d tx_stat:0x%x, rx_stat:0x%x, irq-stat:0x%x\n",
186 dev_dbg(gi2c->se.dev, "m_cmd:0x%x, geni_status:0x%x, geni_ios:0x%x\n",
195 dev_dbg(gi2c->se.dev, "len:%d, slv-addr:0x%x, RD/WR:%d\n",
199 dev_err(gi2c->se.dev, "%s\n", gi2c_log[err].msg);
207 void __iomem *base = gi2c->se.base;
247 dev_dbg(gi2c->se.dev, "i2c dma tx:0x%x, dma rx:0x%x\n",
313 geni_se_abort_m_cmd(&gi2c->se);
317 val = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS);
321 dev_err(gi2c->se.dev, "Timeout abort_m_cmd\n");
329 writel_relaxed(1, gi2c->se.base + SE_DMA_RX_FSM_RST);
332 val = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT);
336 dev_err(gi2c->se.dev, "Timeout resetting RX_FSM\n");
344 writel_relaxed(1, gi2c->se.base + SE_DMA_TX_FSM_RST);
347 val = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT);
351 dev_err(gi2c->se.dev, "Timeout resetting TX_FSM\n");
361 geni_se_rx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len);
373 geni_se_tx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len);
384 struct geni_se *se = &gi2c->se;
392 geni_se_select_mode(se, GENI_SE_DMA);
394 geni_se_select_mode(se, GENI_SE_FIFO);
396 writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN);
397 geni_se_setup_m_cmd(se, I2C_READ, m_param);
399 if (dma_buf && geni_se_rx_dma_prep(se, dma_buf, len, &rx_dma)) {
400 geni_se_select_mode(se, GENI_SE_FIFO);
425 struct geni_se *se = &gi2c->se;
433 geni_se_select_mode(se, GENI_SE_DMA);
435 geni_se_select_mode(se, GENI_SE_FIFO);
437 writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN);
438 geni_se_setup_m_cmd(se, I2C_WRITE, m_param);
440 if (dma_buf && geni_se_tx_dma_prep(se, dma_buf, len, &tx_dma)) {
441 geni_se_select_mode(se, GENI_SE_FIFO);
451 writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG);
472 ret = pm_runtime_get_sync(gi2c->se.dev);
474 dev_err(gi2c->se.dev, "error turning SE resources:%d\n", ret);
475 pm_runtime_put_noidle(gi2c->se.dev);
477 pm_runtime_set_suspended(gi2c->se.dev);
499 pm_runtime_mark_last_busy(gi2c->se.dev);
500 pm_runtime_put_autosuspend(gi2c->se.dev);
536 gi2c->se.dev = dev;
537 gi2c->se.wrapper = dev_get_drvdata(dev->parent);
539 gi2c->se.base = devm_ioremap_resource(dev, res);
540 if (IS_ERR(gi2c->se.base))
541 return PTR_ERR(gi2c->se.base);
543 gi2c->se.clk = devm_clk_get(dev, "se");
544 if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(dev))
545 return PTR_ERR(gi2c->se.clk);
586 ret = geni_icc_get(&gi2c->se, "qup-memory");
594 gi2c->se.icc_paths[GENI_TO_CORE].avg_bw = GENI_DEFAULT_BW;
595 gi2c->se.icc_paths[CPU_TO_GENI].avg_bw = GENI_DEFAULT_BW;
596 gi2c->se.icc_paths[GENI_TO_DDR].avg_bw = Bps_to_icc(gi2c->clk_freq_out);
598 ret = geni_icc_set_bw(&gi2c->se);
602 ret = geni_se_resources_on(&gi2c->se);
607 proto = geni_se_read_proto(&gi2c->se);
608 tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se);
611 geni_se_resources_off(&gi2c->se);
615 geni_se_init(&gi2c->se, gi2c->tx_wm, tx_depth);
616 geni_se_config_packing(&gi2c->se, BITS_PER_BYTE, PACKING_BYTES_PW,
618 ret = geni_se_resources_off(&gi2c->se);
624 ret = geni_icc_disable(&gi2c->se);
628 dev_dbg(dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth);
631 pm_runtime_set_suspended(gi2c->se.dev);
632 pm_runtime_set_autosuspend_delay(gi2c->se.dev, I2C_AUTO_SUSPEND_DELAY);
633 pm_runtime_use_autosuspend(gi2c->se.dev);
634 pm_runtime_enable(gi2c->se.dev);
639 pm_runtime_disable(gi2c->se.dev);
653 pm_runtime_disable(gi2c->se.dev);
671 ret = geni_se_resources_off(&gi2c->se);
680 return geni_icc_disable(&gi2c->se);
688 ret = geni_icc_enable(&gi2c->se);
692 ret = geni_se_resources_on(&gi2c->se);