Lines Matching refs:gi2c
138 static int geni_i2c_clk_map_idx(struct geni_i2c_dev *gi2c)
144 if (itr->clk_freq_out == gi2c->clk_freq_out) {
145 gi2c->clk_fld = itr;
152 static void qcom_geni_i2c_conf(struct geni_i2c_dev *gi2c)
154 const struct geni_i2c_clk_fld *itr = gi2c->clk_fld;
157 writel_relaxed(0, gi2c->se.base + SE_GENI_CLK_SEL);
160 writel_relaxed(val, gi2c->se.base + GENI_SER_M_CLK_CFG);
165 writel_relaxed(val, gi2c->se.base + SE_I2C_SCL_COUNTERS);
168 static void geni_i2c_err_misc(struct geni_i2c_dev *gi2c)
170 u32 m_cmd = readl_relaxed(gi2c->se.base + SE_GENI_M_CMD0);
171 u32 m_stat = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS);
172 u32 geni_s = readl_relaxed(gi2c->se.base + SE_GENI_STATUS);
173 u32 geni_ios = readl_relaxed(gi2c->se.base + SE_GENI_IOS);
174 u32 dma = readl_relaxed(gi2c->se.base + SE_GENI_DMA_MODE_EN);
178 rx_st = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT);
179 tx_st = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT);
181 rx_st = readl_relaxed(gi2c->se.base + SE_GENI_RX_FIFO_STATUS);
182 tx_st = readl_relaxed(gi2c->se.base + SE_GENI_TX_FIFO_STATUS);
184 dev_dbg(gi2c->se.dev, "DMA:%d tx_stat:0x%x, rx_stat:0x%x, irq-stat:0x%x\n",
186 dev_dbg(gi2c->se.dev, "m_cmd:0x%x, geni_status:0x%x, geni_ios:0x%x\n",
190 static void geni_i2c_err(struct geni_i2c_dev *gi2c, int err)
192 if (!gi2c->err)
193 gi2c->err = gi2c_log[err].err;
194 if (gi2c->cur)
195 dev_dbg(gi2c->se.dev, "len:%d, slv-addr:0x%x, RD/WR:%d\n",
196 gi2c->cur->len, gi2c->cur->addr, gi2c->cur->flags);
199 dev_err(gi2c->se.dev, "%s\n", gi2c_log[err].msg);
200 geni_i2c_err_misc(gi2c);
206 struct geni_i2c_dev *gi2c = dev;
207 void __iomem *base = gi2c->se.base;
217 spin_lock(&gi2c->lock);
223 cur = gi2c->cur;
229 geni_i2c_err(gi2c, NACK);
231 geni_i2c_err(gi2c, BUS_PROTO);
233 geni_i2c_err(gi2c, ARB_LOST);
235 geni_i2c_err(gi2c, GENI_OVERRUN);
237 geni_i2c_err(gi2c, GENI_ILLEGAL_CMD);
239 geni_i2c_err(gi2c, GENI_ABORT_DONE);
241 geni_i2c_err(gi2c, GP_IRQ0);
247 dev_dbg(gi2c->se.dev, "i2c dma tx:0x%x, dma rx:0x%x\n",
256 while (gi2c->cur_rd < cur->len && p < sizeof(val)) {
257 cur->buf[gi2c->cur_rd++] = val & 0xff;
261 if (gi2c->cur_rd == cur->len)
266 for (j = 0; j < gi2c->tx_wm; j++) {
271 while (gi2c->cur_wr < cur->len && p < sizeof(val)) {
272 temp = cur->buf[gi2c->cur_wr++];
278 if (gi2c->cur_wr == cur->len) {
297 complete(&gi2c->done);
299 spin_unlock(&gi2c->lock);
304 static void geni_i2c_abort_xfer(struct geni_i2c_dev *gi2c)
310 spin_lock_irqsave(&gi2c->lock, flags);
311 geni_i2c_err(gi2c, GENI_TIMEOUT);
312 gi2c->cur = NULL;
313 geni_se_abort_m_cmd(&gi2c->se);
314 spin_unlock_irqrestore(&gi2c->lock, flags);
316 time_left = wait_for_completion_timeout(&gi2c->done, time_left);
317 val = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS);
321 dev_err(gi2c->se.dev, "Timeout abort_m_cmd\n");
324 static void geni_i2c_rx_fsm_rst(struct geni_i2c_dev *gi2c)
329 writel_relaxed(1, gi2c->se.base + SE_DMA_RX_FSM_RST);
331 time_left = wait_for_completion_timeout(&gi2c->done, time_left);
332 val = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT);
336 dev_err(gi2c->se.dev, "Timeout resetting RX_FSM\n");
339 static void geni_i2c_tx_fsm_rst(struct geni_i2c_dev *gi2c)
344 writel_relaxed(1, gi2c->se.base + SE_DMA_TX_FSM_RST);
346 time_left = wait_for_completion_timeout(&gi2c->done, time_left);
347 val = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT);
351 dev_err(gi2c->se.dev, "Timeout resetting TX_FSM\n");
354 static void geni_i2c_rx_msg_cleanup(struct geni_i2c_dev *gi2c,
357 gi2c->cur_rd = 0;
358 if (gi2c->dma_buf) {
359 if (gi2c->err)
360 geni_i2c_rx_fsm_rst(gi2c);
361 geni_se_rx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len);
362 i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err);
366 static void geni_i2c_tx_msg_cleanup(struct geni_i2c_dev *gi2c,
369 gi2c->cur_wr = 0;
370 if (gi2c->dma_buf) {
371 if (gi2c->err)
372 geni_i2c_tx_fsm_rst(gi2c);
373 geni_se_tx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len);
374 i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err);
378 static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg,
384 struct geni_se *se = &gi2c->se;
404 gi2c->xfer_len = len;
405 gi2c->dma_addr = rx_dma;
406 gi2c->dma_buf = dma_buf;
409 cur = gi2c->cur;
410 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT);
412 geni_i2c_abort_xfer(gi2c);
414 geni_i2c_rx_msg_cleanup(gi2c, cur);
416 return gi2c->err;
419 static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg,
425 struct geni_se *se = &gi2c->se;
445 gi2c->xfer_len = len;
446 gi2c->dma_addr = tx_dma;
447 gi2c->dma_buf = dma_buf;
453 cur = gi2c->cur;
454 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT);
456 geni_i2c_abort_xfer(gi2c);
458 geni_i2c_tx_msg_cleanup(gi2c, cur);
460 return gi2c->err;
467 struct geni_i2c_dev *gi2c = i2c_get_adapdata(adap);
470 gi2c->err = 0;
471 reinit_completion(&gi2c->done);
472 ret = pm_runtime_get_sync(gi2c->se.dev);
474 dev_err(gi2c->se.dev, "error turning SE resources:%d\n", ret);
475 pm_runtime_put_noidle(gi2c->se.dev);
477 pm_runtime_set_suspended(gi2c->se.dev);
481 qcom_geni_i2c_conf(gi2c);
487 gi2c->cur = &msgs[i];
489 ret = geni_i2c_rx_one_msg(gi2c, &msgs[i], m_param);
491 ret = geni_i2c_tx_one_msg(gi2c, &msgs[i], m_param);
499 pm_runtime_mark_last_busy(gi2c->se.dev);
500 pm_runtime_put_autosuspend(gi2c->se.dev);
501 gi2c->cur = NULL;
502 gi2c->err = 0;
526 struct geni_i2c_dev *gi2c;
532 gi2c = devm_kzalloc(dev, sizeof(*gi2c), GFP_KERNEL);
533 if (!gi2c)
536 gi2c->se.dev = dev;
537 gi2c->se.wrapper = dev_get_drvdata(dev->parent);
539 gi2c->se.base = devm_ioremap_resource(dev, res);
540 if (IS_ERR(gi2c->se.base))
541 return PTR_ERR(gi2c->se.base);
543 gi2c->se.clk = devm_clk_get(dev, "se");
544 if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(dev))
545 return PTR_ERR(gi2c->se.clk);
548 &gi2c->clk_freq_out);
551 gi2c->clk_freq_out = KHZ(100);
555 ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(dev));
557 gi2c->irq = platform_get_irq(pdev, 0);
558 if (gi2c->irq < 0)
559 return gi2c->irq;
561 ret = geni_i2c_clk_map_idx(gi2c);
564 gi2c->clk_freq_out, ret);
568 gi2c->adap.algo = &geni_i2c_algo;
569 init_completion(&gi2c->done);
570 spin_lock_init(&gi2c->lock);
571 platform_set_drvdata(pdev, gi2c);
572 ret = devm_request_irq(dev, gi2c->irq, geni_i2c_irq, 0,
573 dev_name(dev), gi2c);
576 gi2c->irq, ret);
580 disable_irq(gi2c->irq);
581 i2c_set_adapdata(&gi2c->adap, gi2c);
582 gi2c->adap.dev.parent = dev;
583 gi2c->adap.dev.of_node = dev->of_node;
584 strlcpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name));
586 ret = geni_icc_get(&gi2c->se, "qup-memory");
594 gi2c->se.icc_paths[GENI_TO_CORE].avg_bw = GENI_DEFAULT_BW;
595 gi2c->se.icc_paths[CPU_TO_GENI].avg_bw = GENI_DEFAULT_BW;
596 gi2c->se.icc_paths[GENI_TO_DDR].avg_bw = Bps_to_icc(gi2c->clk_freq_out);
598 ret = geni_icc_set_bw(&gi2c->se);
602 ret = geni_se_resources_on(&gi2c->se);
607 proto = geni_se_read_proto(&gi2c->se);
608 tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se);
611 geni_se_resources_off(&gi2c->se);
614 gi2c->tx_wm = tx_depth - 1;
615 geni_se_init(&gi2c->se, gi2c->tx_wm, tx_depth);
616 geni_se_config_packing(&gi2c->se, BITS_PER_BYTE, PACKING_BYTES_PW,
618 ret = geni_se_resources_off(&gi2c->se);
624 ret = geni_icc_disable(&gi2c->se);
630 gi2c->suspended = 1;
631 pm_runtime_set_suspended(gi2c->se.dev);
632 pm_runtime_set_autosuspend_delay(gi2c->se.dev, I2C_AUTO_SUSPEND_DELAY);
633 pm_runtime_use_autosuspend(gi2c->se.dev);
634 pm_runtime_enable(gi2c->se.dev);
636 ret = i2c_add_adapter(&gi2c->adap);
639 pm_runtime_disable(gi2c->se.dev);
650 struct geni_i2c_dev *gi2c = platform_get_drvdata(pdev);
652 i2c_del_adapter(&gi2c->adap);
653 pm_runtime_disable(gi2c->se.dev);
659 struct geni_i2c_dev *gi2c = platform_get_drvdata(pdev);
662 i2c_mark_adapter_suspended(&gi2c->adap);
668 struct geni_i2c_dev *gi2c = dev_get_drvdata(dev);
670 disable_irq(gi2c->irq);
671 ret = geni_se_resources_off(&gi2c->se);
673 enable_irq(gi2c->irq);
677 gi2c->suspended = 1;
680 return geni_icc_disable(&gi2c->se);
686 struct geni_i2c_dev *gi2c = dev_get_drvdata(dev);
688 ret = geni_icc_enable(&gi2c->se);
692 ret = geni_se_resources_on(&gi2c->se);
696 enable_irq(gi2c->irq);
697 gi2c->suspended = 0;
703 struct geni_i2c_dev *gi2c = dev_get_drvdata(dev);
705 i2c_mark_adapter_suspended(&gi2c->adap);
707 if (!gi2c->suspended) {
718 struct geni_i2c_dev *gi2c = dev_get_drvdata(dev);
720 i2c_mark_adapter_resumed(&gi2c->adap);