Lines Matching refs:pmcmsptwi_writel
60 #define pmcmsptwi_writel __raw_writel
178 pmcmsptwi_writel(pmcmsptwi_clock_to_reg(&cfg->standard),
180 pmcmsptwi_writel(pmcmsptwi_clock_to_reg(&cfg->highspeed),
204 pmcmsptwi_writel(pmcmsptwi_cfg_to_reg(cfg),
246 pmcmsptwi_writel(reason, data->iobase + MSP_TWI_INT_STS_REG_OFFSET);
307 pmcmsptwi_writel(MSP_TWI_INT_STS_DONE,
339 pmcmsptwi_writel(0,
363 pmcmsptwi_writel(0,
390 pmcmsptwi_writel(reason, data->iobase +
412 pmcmsptwi_writel(reg, data->iobase + MSP_TWI_CMD_REG_OFFSET);
450 pmcmsptwi_writel(cmd->addr, data->iobase + MSP_TWI_ADD_REG_OFFSET);
457 pmcmsptwi_writel(tmp & 0x00000000ffffffffLL,
460 pmcmsptwi_writel(tmp >> 32,