Lines Matching refs:dev
209 * @dev: private data of I2C Driver
214 static int flush_i2c_fifo(struct nmk_i2c_dev *dev)
227 writel((I2C_CR_FTX | I2C_CR_FRX), dev->virtbase + I2C_CR);
230 timeout = jiffies + dev->adap.timeout;
233 if ((readl(dev->virtbase + I2C_CR) &
239 dev_err(&dev->adev->dev,
248 * @dev: private data of I2C Driver
250 static void disable_all_interrupts(struct nmk_i2c_dev *dev)
253 writel(mask, dev->virtbase + I2C_IMSCR);
258 * @dev: private data of I2C Driver
260 static void clear_all_interrupts(struct nmk_i2c_dev *dev)
264 writel(mask, dev->virtbase + I2C_ICR);
269 * @dev: private data of I2C Driver
271 static int init_hw(struct nmk_i2c_dev *dev)
275 stat = flush_i2c_fifo(dev);
280 i2c_clr_bit(dev->virtbase + I2C_CR , I2C_CR_PE);
282 disable_all_interrupts(dev);
284 clear_all_interrupts(dev);
286 dev->cli.operation = I2C_NO_OPERATION;
297 * @dev: private data of controller
300 static u32 load_i2c_mcr_reg(struct nmk_i2c_dev *dev, u16 flags)
305 mcr |= GEN_MASK(dev->cli.slave_adr, I2C_MCR_A7, 1);
316 slave_adr_3msb_bits = (dev->cli.slave_adr >> 7) & 0x7;
328 if (dev->cli.operation == I2C_WRITE)
334 if (dev->stop)
339 mcr |= GEN_MASK(dev->cli.count, I2C_MCR_LENGTH, 15);
346 * @dev: private data of controller
348 static void setup_i2c_controller(struct nmk_i2c_dev *dev)
355 writel(0x0, dev->virtbase + I2C_CR);
356 writel(0x0, dev->virtbase + I2C_HSMCR);
357 writel(0x0, dev->virtbase + I2C_TFTR);
358 writel(0x0, dev->virtbase + I2C_RFTR);
359 writel(0x0, dev->virtbase + I2C_DMAR);
361 i2c_clk = clk_get_rate(dev->clk);
376 switch (dev->sm) {
391 dev_dbg(&dev->adev->dev, "calculated SLSU = %04x\n", slsu);
392 writel(slsu << 16, dev->virtbase + I2C_SCR);
399 div = (dev->clk_freq > I2C_MAX_STANDARD_MODE_FREQ) ? 3 : 2;
409 brcr2 = (i2c_clk/(dev->clk_freq * div)) & 0xffff;
412 writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR);
420 if (dev->sm > I2C_FREQ_MODE_FAST) {
421 dev_err(&dev->adev->dev,
424 writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR);
426 dev->virtbase + I2C_CR);
428 writel(dev->sm << 4, dev->virtbase + I2C_CR);
431 writel(dev->tft, dev->virtbase + I2C_TFTR);
432 writel(dev->rft, dev->virtbase + I2C_RFTR);
437 * @dev: private data of I2C Driver
444 static int read_i2c(struct nmk_i2c_dev *dev, u16 flags)
450 mcr = load_i2c_mcr_reg(dev, flags);
451 writel(mcr, dev->virtbase + I2C_MCR);
454 writel(readl(dev->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR,
455 dev->virtbase + I2C_CR);
458 i2c_set_bit(dev->virtbase + I2C_CR, I2C_CR_PE);
460 init_completion(&dev->xfer_complete);
466 if (dev->stop || !dev->vendor->has_mtdws)
473 writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask,
474 dev->virtbase + I2C_IMSCR);
477 &dev->xfer_complete, dev->adap.timeout);
481 dev_err(&dev->adev->dev, "read from slave 0x%x timed out\n",
482 dev->cli.slave_adr);
488 static void fill_tx_fifo(struct nmk_i2c_dev *dev, int no_bytes)
494 (dev->cli.count != 0);
497 writeb(*dev->cli.buffer,
498 dev->virtbase + I2C_TFR);
499 dev->cli.buffer++;
500 dev->cli.count--;
501 dev->cli.xfer_bytes++;
508 * @dev: private data of I2C Driver
513 static int write_i2c(struct nmk_i2c_dev *dev, u16 flags)
519 mcr = load_i2c_mcr_reg(dev, flags);
521 writel(mcr, dev->virtbase + I2C_MCR);
524 writel(readl(dev->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR,
525 dev->virtbase + I2C_CR);
528 i2c_set_bit(dev->virtbase + I2C_CR , I2C_CR_PE);
530 init_completion(&dev->xfer_complete);
536 fill_tx_fifo(dev, MAX_I2C_FIFO_THRESHOLD);
538 if (dev->cli.count != 0)
546 if (dev->stop || !dev->vendor->has_mtdws)
553 writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask,
554 dev->virtbase + I2C_IMSCR);
557 &dev->xfer_complete, dev->adap.timeout);
561 dev_err(&dev->adev->dev, "write to slave 0x%x timed out\n",
562 dev->cli.slave_adr);
571 * @dev: device with a message encoded into it
574 static int nmk_i2c_xfer_one(struct nmk_i2c_dev *dev, u16 flags)
580 dev->cli.operation = I2C_READ;
581 status = read_i2c(dev, flags);
584 dev->cli.operation = I2C_WRITE;
585 status = write_i2c(dev, flags);
588 if (status || (dev->result)) {
592 i2c_sr = readl(dev->virtbase + I2C_SR);
600 dev_err(&dev->adev->dev, "%s\n",
606 (void) init_hw(dev);
608 status = status ? status : dev->result;
666 struct nmk_i2c_dev *dev = i2c_get_adapdata(i2c_adap);
669 pm_runtime_get_sync(&dev->adev->dev);
674 setup_i2c_controller(dev);
677 dev->cli.slave_adr = msgs[i].addr;
678 dev->cli.buffer = msgs[i].buf;
679 dev->cli.count = msgs[i].len;
680 dev->stop = (i < (num_msgs - 1)) ? 0 : 1;
681 dev->result = 0;
683 status = nmk_i2c_xfer_one(dev, msgs[i].flags);
691 pm_runtime_put_sync(&dev->adev->dev);
702 * @dev: private data of controller
705 static int disable_interrupts(struct nmk_i2c_dev *dev, u32 irq)
708 writel(readl(dev->virtbase + I2C_IMSCR) & ~(I2C_CLEAR_ALL_INTS & irq),
709 dev->virtbase + I2C_IMSCR);
726 struct nmk_i2c_dev *dev = arg;
732 tft = readl(dev->virtbase + I2C_TFTR);
733 rft = readl(dev->virtbase + I2C_RFTR);
736 misr = readl(dev->virtbase + I2C_MISR);
744 if (dev->cli.operation == I2C_READ) {
749 disable_interrupts(dev, I2C_IT_TXFNE);
751 fill_tx_fifo(dev, (MAX_I2C_FIFO_THRESHOLD - tft));
756 if (dev->cli.count == 0)
757 disable_interrupts(dev, I2C_IT_TXFNE);
771 *dev->cli.buffer = readb(dev->virtbase + I2C_RFR);
772 dev->cli.buffer++;
774 dev->cli.count -= rft;
775 dev->cli.xfer_bytes += rft;
781 *dev->cli.buffer = readb(dev->virtbase + I2C_RFR);
782 dev->cli.buffer++;
784 dev->cli.count -= MAX_I2C_FIFO_THRESHOLD;
785 dev->cli.xfer_bytes += MAX_I2C_FIFO_THRESHOLD;
791 if (dev->cli.operation == I2C_READ) {
792 while (!(readl(dev->virtbase + I2C_RISR)
794 if (dev->cli.count == 0)
796 *dev->cli.buffer =
797 readb(dev->virtbase + I2C_RFR);
798 dev->cli.buffer++;
799 dev->cli.count--;
800 dev->cli.xfer_bytes++;
804 disable_all_interrupts(dev);
805 clear_all_interrupts(dev);
807 if (dev->cli.count) {
808 dev->result = -EIO;
809 dev_err(&dev->adev->dev,
811 dev->cli.count);
812 (void) init_hw(dev);
814 complete(&dev->xfer_complete);
820 dev->result = -EIO;
821 (void) init_hw(dev);
823 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MAL);
824 complete(&dev->xfer_complete);
834 dev->result = -EIO;
836 if (((readl(dev->virtbase + I2C_SR) >> 2) & 0x3) == I2C_ABORT)
837 (void) init_hw(dev);
839 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_BERR);
840 complete(&dev->xfer_complete);
850 dev->result = -EIO;
851 (void) init_hw(dev);
853 dev_err(&dev->adev->dev, "Tx Fifo Over run\n");
854 complete(&dev->xfer_complete);
866 dev_err(&dev->adev->dev, "unhandled Interrupt\n");
869 dev_err(&dev->adev->dev, "spurious Interrupt..\n");
877 static int nmk_i2c_suspend_late(struct device *dev)
881 ret = pm_runtime_force_suspend(dev);
885 pinctrl_pm_select_sleep_state(dev);
889 static int nmk_i2c_resume_early(struct device *dev)
891 return pm_runtime_force_resume(dev);
896 static int nmk_i2c_runtime_suspend(struct device *dev)
898 struct amba_device *adev = to_amba_device(dev);
902 pinctrl_pm_select_idle_state(dev);
906 static int nmk_i2c_runtime_resume(struct device *dev)
908 struct amba_device *adev = to_amba_device(dev);
914 dev_err(dev, "can't prepare_enable clock\n");
918 pinctrl_pm_select_default_state(dev);
923 pinctrl_pm_select_idle_state(dev);
967 struct device_node *np = adev->dev.of_node;
968 struct nmk_i2c_dev *dev;
973 dev = devm_kzalloc(&adev->dev, sizeof(*dev), GFP_KERNEL);
974 if (!dev)
977 dev->vendor = vendor;
978 dev->adev = adev;
979 nmk_i2c_of_probe(np, dev);
981 if (dev->tft > max_fifo_threshold) {
982 dev_warn(&adev->dev, "requested TX FIFO threshold %u, adjusted down to %u\n",
983 dev->tft, max_fifo_threshold);
984 dev->tft = max_fifo_threshold;
987 if (dev->rft > max_fifo_threshold) {
988 dev_warn(&adev->dev, "requested RX FIFO threshold %u, adjusted down to %u\n",
989 dev->rft, max_fifo_threshold);
990 dev->rft = max_fifo_threshold;
993 amba_set_drvdata(adev, dev);
995 dev->virtbase = devm_ioremap(&adev->dev, adev->res.start,
997 if (!dev->virtbase)
1000 dev->irq = adev->irq[0];
1001 ret = devm_request_irq(&adev->dev, dev->irq, i2c_irq_handler, 0,
1002 DRIVER_NAME, dev);
1004 dev_err(&adev->dev, "cannot claim the irq %d\n", dev->irq);
1008 dev->clk = devm_clk_get_enabled(&adev->dev, NULL);
1009 if (IS_ERR(dev->clk)) {
1010 dev_err(&adev->dev, "could enable i2c clock\n");
1011 return PTR_ERR(dev->clk);
1014 init_hw(dev);
1016 adap = &dev->adap;
1017 adap->dev.of_node = np;
1018 adap->dev.parent = &adev->dev;
1022 adap->timeout = msecs_to_jiffies(dev->timeout);
1026 i2c_set_adapdata(adap, dev);
1028 dev_info(&adev->dev,
1030 adap->name, dev->virtbase);
1036 pm_runtime_put(&adev->dev);
1043 struct nmk_i2c_dev *dev = amba_get_drvdata(adev);
1045 i2c_del_adapter(&dev->adap);
1046 flush_i2c_fifo(dev);
1047 disable_all_interrupts(dev);
1048 clear_all_interrupts(dev);
1050 i2c_clr_bit(dev->virtbase + I2C_CR, I2C_CR_PE);