Lines Matching defs:data
104 * struct mxs_i2c_dev - per device, private MXS-I2C data
199 /* Queue the DMA data transfer. */
208 "Failed to get DMA data write descriptor.\n");
228 /* Queue the DMA data transfer. */
237 "Failed to get DMA data write descriptor.\n");
259 /* Queue the DMA data transfer. */
270 "Failed to get DMA data write descriptor.\n");
358 u32 data)
365 writel(data, i2c->regs + MXS_I2C_DATA(i2c));
374 uint32_t data = 0;
387 * to support PIO, when we try to transfer any amount of data
404 * can not in any way make sure we can read the data from the
407 * time. Finally, there is no bit indicating us that new data
436 data = readl(i2c->regs + MXS_I2C_DATA(i2c));
438 msg->buf[i] = data & 0xff;
439 data >>= 8;
446 * the possibility of kernel not being able to supply data
448 * of data using PIO write.
452 * The LSB of data buffer is the first byte blasted across
457 data = addr_data << 24;
467 data >>= 8;
468 data |= (msg->buf[i] << 24);
481 /* Four bytes are ready in the "data" variable. */
491 * data accordingly.
504 data >>= (4 - xlen) * 8;
519 MXS_I2C_CTRL0_XFER_COUNT(xlen), data);
725 * The I2C spec specifies the following timing data:
729 * tSU;DAT (data setup time) 250 ns 100 ns
796 { .compatible = "fsl,imx23-i2c", .data = &mxs_i2c_devtype[0], },
797 { .compatible = "fsl,imx28-i2c", .data = &mxs_i2c_devtype[1], },
816 const struct platform_device_id *device_id = of_id->data;