Lines Matching refs:fdr
72 u8 fdr, dfsrr;
80 u16 fdr; /* including dfsrr */
289 /* see below - default fdr = 0x3f -> div = 2048 */
304 if (div->fdr & 0xc0 && pvr == 0x80822011)
311 return (int)div->fdr;
318 int ret, fdr;
321 dev_dbg(i2c->dev, "using fdr %d\n",
327 fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */
329 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
332 dev_info(i2c->dev, "clock %u Hz (fdr=%d)\n", i2c->real_clk,
333 fdr);
476 /* see below - default fdr = 0x1031 -> div = 16 * 3072 */
497 return div ? (int)div->fdr : -EINVAL;
504 int ret, fdr;
507 dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n",
514 fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */
516 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
517 writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR);
520 dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n",
521 i2c->real_clk, fdr >> 8, fdr & 0xff);
883 i2c->fdr = readb(i2c->base + MPC_I2C_FDR);
893 writeb(i2c->fdr, i2c->base + MPC_I2C_FDR);