Lines Matching refs:i2c
15 #include <linux/i2c.h>
171 static inline unsigned short jz4780_i2c_readw(struct jz4780_i2c *i2c,
174 return readw(i2c->iomem + offset);
177 static inline void jz4780_i2c_writew(struct jz4780_i2c *i2c,
180 writew(val, i2c->iomem + offset);
183 static int jz4780_i2c_disable(struct jz4780_i2c *i2c)
188 jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 0);
191 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA);
198 dev_err(&i2c->adap.dev, "disable failed: ENSTA=0x%04x\n", regval);
202 static int jz4780_i2c_enable(struct jz4780_i2c *i2c)
207 jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 1);
210 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA);
217 dev_err(&i2c->adap.dev, "enable failed: ENSTA=0x%04x\n", regval);
221 static int jz4780_i2c_set_target(struct jz4780_i2c *i2c, unsigned char address)
227 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
236 jz4780_i2c_writew(i2c, JZ4780_I2C_TAR, address);
240 dev_err(&i2c->adap.dev,
247 static int jz4780_i2c_set_speed(struct jz4780_i2c *i2c)
249 int dev_clk_khz = clk_get_rate(i2c->clk) / 1000;
256 int i2c_clk = i2c->speed;
258 if (jz4780_i2c_disable(i2c))
259 dev_dbg(&i2c->adap.dev, "i2c not disabled\n");
276 * NOTE: JZ4780_I2C_CTRL_REST can't set when i2c enabled, because
277 * normal read are 2 messages, we cannot disable i2c controller
285 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
287 jz4780_i2c_writew(i2c, JZ4780_I2C_SHCNT,
289 jz4780_i2c_writew(i2c, JZ4780_I2C_SLCNT,
294 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
296 jz4780_i2c_writew(i2c, JZ4780_I2C_FHCNT,
298 jz4780_i2c_writew(i2c, JZ4780_I2C_FLCNT,
303 * a i2c device must internally provide a hold time at least 300ns
337 jz4780_i2c_writew(i2c, JZ4780_I2C_SDASU, setup_time);
343 /*i2c hold time enable */
344 if (i2c->cdata->version >= ID_X1000) {
345 jz4780_i2c_writew(i2c, X1000_I2C_SDAHD, hold_time);
348 jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, hold_time);
352 if (i2c->cdata->version >= ID_X1000)
353 jz4780_i2c_writew(i2c, X1000_I2C_SDAHD, 0);
355 jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, 0);
361 static int jz4780_i2c_cleanup(struct jz4780_i2c *i2c)
367 spin_lock_irqsave(&i2c->lock, flags);
370 if (i2c->cdata->version < ID_X1000) {
371 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
373 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
377 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0);
380 jz4780_i2c_readw(i2c, JZ4780_I2C_CTXABRT);
381 jz4780_i2c_readw(i2c, JZ4780_I2C_CINTR);
384 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
386 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
389 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
391 spin_unlock_irqrestore(&i2c->lock, flags);
393 ret = jz4780_i2c_disable(i2c);
395 dev_err(&i2c->adap.dev,
398 if (unlikely(jz4780_i2c_readw(i2c, JZ4780_I2C_INTM)
399 & jz4780_i2c_readw(i2c, JZ4780_I2C_INTST)))
400 dev_err(&i2c->adap.dev,
406 static int jz4780_i2c_prepare(struct jz4780_i2c *i2c)
408 jz4780_i2c_set_speed(i2c);
409 return jz4780_i2c_enable(i2c);
412 static void jz4780_i2c_send_rcmd(struct jz4780_i2c *i2c,
419 jz4780_i2c_writew(i2c, JZ4780_I2C_DC, JZ4780_I2C_DC_READ);
421 if ((cmd_left == 0) && (i2c->cdata->version >= ID_X1000))
422 jz4780_i2c_writew(i2c, JZ4780_I2C_DC,
425 jz4780_i2c_writew(i2c, JZ4780_I2C_DC, JZ4780_I2C_DC_READ);
428 static void jz4780_i2c_trans_done(struct jz4780_i2c *i2c)
430 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0);
431 complete(&i2c->trans_waitq);
439 struct jz4780_i2c *i2c = dev_id;
442 spin_lock_irqsave(&i2c->lock, flags);
443 intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM);
444 intst = jz4780_i2c_readw(i2c, JZ4780_I2C_INTST);
449 jz4780_i2c_trans_done(i2c);
454 dev_dbg(&i2c->adap.dev, "received fifo overflow!\n");
455 jz4780_i2c_trans_done(i2c);
463 if (i2c->is_write == 0) {
466 while ((jz4780_i2c_readw(i2c, JZ4780_I2C_STA)
468 *(i2c->rbuf++) = jz4780_i2c_readw(i2c, JZ4780_I2C_DC)
470 i2c->rd_data_xfered++;
471 if (i2c->rd_data_xfered == i2c->rd_total_len) {
472 jz4780_i2c_trans_done(i2c);
477 rd_left = i2c->rd_total_len - i2c->rd_data_xfered;
479 if (rd_left <= i2c->cdata->fifosize)
480 jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, rd_left - 1);
484 if (i2c->is_write == 0) {
485 int cmd_left = i2c->rd_total_len - i2c->rd_cmd_xfered;
486 int max_send = (i2c->cdata->fifosize - 1)
487 - (i2c->rd_cmd_xfered
488 - i2c->rd_data_xfered);
491 if (i2c->rd_cmd_xfered != 0)
493 i2c->cdata->fifosize
494 - i2c->cdata->tx_level - 1);
497 i2c->rd_cmd_xfered += cmd_to_send;
498 cmd_left = i2c->rd_total_len -
499 i2c->rd_cmd_xfered;
500 jz4780_i2c_send_rcmd(i2c,
506 intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM);
508 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, intmsk);
510 if (i2c->cdata->version < ID_X1000) {
511 tmp = jz4780_i2c_readw(i2c,
514 jz4780_i2c_writew(i2c,
522 i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
525 (i2c->wt_len > 0)) {
526 i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
527 data = *i2c->wbuf;
529 if ((i2c->wt_len == 1) && (!i2c->stop_hold) &&
530 (i2c->cdata->version >= ID_X1000))
532 jz4780_i2c_writew(i2c, JZ4780_I2C_DC, data);
533 i2c->wbuf++;
534 i2c->wt_len--;
537 if (i2c->wt_len == 0) {
538 if ((!i2c->stop_hold) && (i2c->cdata->version <
540 tmp = jz4780_i2c_readw(i2c,
543 jz4780_i2c_writew(i2c,
547 jz4780_i2c_trans_done(i2c);
554 spin_unlock_irqrestore(&i2c->lock, flags);
558 static void jz4780_i2c_txabrt(struct jz4780_i2c *i2c, int src)
560 dev_dbg(&i2c->adap.dev, "txabrt: 0x%08x, cmd: %d, send: %d, recv: %d\n",
561 src, i2c->cmd, i2c->cmd_buf[i2c->cmd], i2c->data_buf[i2c->cmd]);
564 static inline int jz4780_i2c_xfer_read(struct jz4780_i2c *i2c,
576 spin_lock_irqsave(&i2c->lock, flags);
578 i2c->stop_hold = 0;
579 i2c->is_write = 0;
580 i2c->rbuf = buf;
581 i2c->rd_total_len = len;
582 i2c->rd_data_xfered = 0;
583 i2c->rd_cmd_xfered = 0;
585 if (len <= i2c->cdata->fifosize)
586 jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, len - 1);
588 jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, i2c->cdata->rx_level);
590 jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, i2c->cdata->tx_level);
592 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM,
596 if (i2c->cdata->version < ID_X1000) {
597 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
599 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
602 spin_unlock_irqrestore(&i2c->lock, flags);
604 timeout = wait_for_completion_timeout(&i2c->trans_waitq,
608 dev_err(&i2c->adap.dev, "irq read timeout\n");
609 dev_dbg(&i2c->adap.dev, "send cmd count:%d %d\n",
610 i2c->cmd, i2c->cmd_buf[i2c->cmd]);
611 dev_dbg(&i2c->adap.dev, "receive data count:%d %d\n",
612 i2c->cmd, i2c->data_buf[i2c->cmd]);
616 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT);
618 jz4780_i2c_txabrt(i2c, tmp);
625 static inline int jz4780_i2c_xfer_write(struct jz4780_i2c *i2c,
635 spin_lock_irqsave(&i2c->lock, flags);
638 i2c->stop_hold = 1;
640 i2c->stop_hold = 0;
642 i2c->is_write = 1;
643 i2c->wbuf = buf;
644 i2c->wt_len = len;
646 jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, i2c->cdata->tx_level);
648 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, JZ4780_I2C_INTM_MTXEMP
651 if (i2c->cdata->version < ID_X1000) {
652 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
654 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
657 spin_unlock_irqrestore(&i2c->lock, flags);
659 timeout = wait_for_completion_timeout(&i2c->trans_waitq,
661 if (timeout && !i2c->stop_hold) {
667 i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
678 dev_err(&i2c->adap.dev, "write wait timeout\n");
682 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT);
684 jz4780_i2c_txabrt(i2c, tmp);
696 struct jz4780_i2c *i2c = adap->algo_data;
698 ret = jz4780_i2c_prepare(i2c);
700 dev_err(&i2c->adap.dev, "I2C prepare failed\n");
704 if (msg->addr != jz4780_i2c_readw(i2c, JZ4780_I2C_TAR)) {
705 ret = jz4780_i2c_set_target(i2c, msg->addr);
711 ret = jz4780_i2c_xfer_read(i2c, msg->buf, msg->len,
714 ret = jz4780_i2c_xfer_write(i2c, msg->buf, msg->len,
724 jz4780_i2c_cleanup(i2c);
755 { .compatible = "ingenic,jz4770-i2c", .data = &jz4780_i2c_config },
756 { .compatible = "ingenic,jz4780-i2c", .data = &jz4780_i2c_config },
757 { .compatible = "ingenic,x1000-i2c", .data = &x1000_i2c_config },
767 struct jz4780_i2c *i2c;
769 i2c = devm_kzalloc(&pdev->dev, sizeof(struct jz4780_i2c), GFP_KERNEL);
770 if (!i2c)
773 i2c->cdata = device_get_match_data(&pdev->dev);
774 if (!i2c->cdata) {
779 i2c->adap.owner = THIS_MODULE;
780 i2c->adap.algo = &jz4780_i2c_algorithm;
781 i2c->adap.algo_data = i2c;
782 i2c->adap.retries = 5;
783 i2c->adap.dev.parent = &pdev->dev;
784 i2c->adap.dev.of_node = pdev->dev.of_node;
785 sprintf(i2c->adap.name, "%s", pdev->name);
787 init_completion(&i2c->trans_waitq);
788 spin_lock_init(&i2c->lock);
790 i2c->iomem = devm_platform_ioremap_resource(pdev, 0);
791 if (IS_ERR(i2c->iomem))
792 return PTR_ERR(i2c->iomem);
794 platform_set_drvdata(pdev, i2c);
796 i2c->clk = devm_clk_get(&pdev->dev, NULL);
797 if (IS_ERR(i2c->clk))
798 return PTR_ERR(i2c->clk);
800 ret = clk_prepare_enable(i2c->clk);
811 i2c->speed = clk_freq / 1000;
812 if (i2c->speed == 0) {
817 jz4780_i2c_set_speed(i2c);
819 dev_info(&pdev->dev, "Bus frequency is %d KHz\n", i2c->speed);
821 if (i2c->cdata->version < ID_X1000) {
822 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
824 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
827 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0x0);
832 i2c->irq = ret;
833 ret = devm_request_irq(&pdev->dev, i2c->irq, jz4780_i2c_irq, 0,
834 dev_name(&pdev->dev), i2c);
838 ret = i2c_add_adapter(&i2c->adap);
845 clk_disable_unprepare(i2c->clk);
851 struct jz4780_i2c *i2c = platform_get_drvdata(pdev);
853 clk_disable_unprepare(i2c->clk);
854 i2c_del_adapter(&i2c->adap);
862 .name = "jz4780-i2c",
871 MODULE_DESCRIPTION("i2c driver for JZ4780 SoCs");