Lines Matching defs:adap
111 #define pch_dbg(adap, fmt, arg...) \
112 dev_dbg(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)
114 #define pch_err(adap, fmt, arg...) \
115 dev_err(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)
205 * @adap: Pointer to struct i2c_algo_pch_data.
207 static void pch_i2c_init(struct i2c_algo_pch_data *adap)
209 void __iomem *p = adap->pch_base_address;
222 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_I2CCTL_I2CMEN);
230 pch_dbg(adap, "Fast mode enabled\n");
246 pch_dbg(adap,
255 * @adap: Pointer to struct i2c_algo_pch_data.
258 static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap,
261 void __iomem *p = adap->pch_base_address;
267 pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
268 pch_err(adap, "%s: Timeout Error.return%d\n",
270 pch_i2c_init(adap);
290 * @adap: Pointer to struct i2c_algo_pch_data.
294 static void pch_i2c_start(struct i2c_algo_pch_data *adap)
296 void __iomem *p = adap->pch_base_address;
297 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
298 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_START);
303 * @adap: Pointer to struct i2c_algo_pch_data.
305 static void pch_i2c_stop(struct i2c_algo_pch_data *adap)
307 void __iomem *p = adap->pch_base_address;
308 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
310 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_START);
313 static int pch_i2c_wait_for_check_xfer(struct i2c_algo_pch_data *adap)
316 void __iomem *p = adap->pch_base_address;
319 (adap->pch_event_flag != 0), msecs_to_jiffies(1000));
321 pch_err(adap, "%s:wait-event timeout\n", __func__);
322 adap->pch_event_flag = 0;
323 pch_i2c_stop(adap);
324 pch_i2c_init(adap);
328 if (adap->pch_event_flag & I2C_ERROR_MASK) {
329 pch_err(adap, "Lost Arbitration\n");
330 adap->pch_event_flag = 0;
331 pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT);
332 pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
333 pch_i2c_init(adap);
337 adap->pch_event_flag = 0;
340 pch_dbg(adap, "Receive NACK for slave address setting\n");
349 * @adap: Pointer to struct i2c_algo_pch_data.
351 static void pch_i2c_repstart(struct i2c_algo_pch_data *adap)
353 void __iomem *p = adap->pch_base_address;
354 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
355 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_REPSTART);
370 struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
378 void __iomem *p = adap->pch_base_address;
385 pch_setbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);
387 pch_dbg(adap, "I2CCTL = %x msgs->len = %d\n", ioread32(p + PCH_I2CCTL),
391 if (pch_i2c_wait_for_bus_idle(adap, BUS_IDLE_TIMEOUT) == -ETIME)
399 pch_i2c_start(adap);
401 rtn = pch_i2c_wait_for_check_xfer(adap);
411 pch_i2c_start(adap);
414 rtn = pch_i2c_wait_for_check_xfer(adap);
421 pch_dbg(adap, "writing %x to Data register\n", buf[wrcount]);
423 rtn = pch_i2c_wait_for_check_xfer(adap);
427 pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMCF_BIT);
428 pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
433 pch_i2c_stop(adap);
435 pch_i2c_repstart(adap);
437 pch_dbg(adap, "return=%d\n", wrcount);
444 * @adap: Pointer to struct i2c_algo_pch_data.
446 static void pch_i2c_sendack(struct i2c_algo_pch_data *adap)
448 void __iomem *p = adap->pch_base_address;
449 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
450 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK);
455 * @adap: Pointer to struct i2c_algo_pch_data.
457 static void pch_i2c_sendnack(struct i2c_algo_pch_data *adap)
459 void __iomem *p = adap->pch_base_address;
460 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
461 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK);
466 * @adap: Pointer to struct i2c_algo_pch_data.
470 static void pch_i2c_restart(struct i2c_algo_pch_data *adap)
472 void __iomem *p = adap->pch_base_address;
473 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
474 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_RESTART);
487 struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
495 void __iomem *p = adap->pch_base_address;
503 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);
506 if (pch_i2c_wait_for_bus_idle(adap, BUS_IDLE_TIMEOUT) == -ETIME)
514 pch_i2c_start(adap);
516 rtn = pch_i2c_wait_for_check_xfer(adap);
523 pch_i2c_restart(adap);
525 rtn = pch_i2c_wait_for_check_xfer(adap);
538 pch_i2c_start(adap);
540 rtn = pch_i2c_wait_for_check_xfer(adap);
545 pch_i2c_stop(adap);
552 pch_i2c_sendack(adap);
561 rtn = pch_i2c_wait_for_check_xfer(adap);
566 pch_i2c_sendnack(adap);
573 rtn = pch_i2c_wait_for_check_xfer(adap);
578 pch_i2c_stop(adap);
580 pch_i2c_repstart(adap);
591 * @adap: Pointer to struct i2c_algo_pch_data.
593 static void pch_i2c_cb(struct i2c_algo_pch_data *adap)
596 void __iomem *p = adap->pch_base_address;
601 adap->pch_event_flag |= I2CMAL_EVENT;
604 adap->pch_event_flag |= I2CMCF_EVENT;
607 pch_clrbit(adap->pch_base_address, PCH_I2CSR, sts);
609 pch_dbg(adap, "PCH_I2CSR = %x\n", ioread32(p + PCH_I2CSR));
661 struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
667 if (adap->p_adapter_info->pch_i2c_suspended) {
672 pch_dbg(adap, "adap->p_adapter_info->pch_i2c_suspended is %d\n",
673 adap->p_adapter_info->pch_i2c_suspended);
675 adap->pch_i2c_xfer_in_progress = true;
679 pmsg->flags |= adap->pch_buff_mode_en;
681 pch_dbg(adap,
693 adap->pch_i2c_xfer_in_progress = false; /* transfer completed */
702 * @adap: Pointer to struct i2c_algo_pch_data.
704 static u32 pch_i2c_func(struct i2c_adapter *adap)
716 * @adap: Pointer to struct i2c_algo_pch_data.
718 static void pch_i2c_disbl_int(struct i2c_algo_pch_data *adap)
720 void __iomem *p = adap->pch_base_address;
722 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, NORMAL_INTR_ENBL);