Lines Matching refs:base
157 void __iomem *base;
178 dev->base + CS_OFFSET);
185 dev->base + CS_OFFSET);
192 dev->base + CS_OFFSET);
198 dev->base + CS_OFFSET);
208 writel(readl(dev->base + CLKEN_OFFSET) | CLKEN_CLKEN_MASK,
209 dev->base + CLKEN_OFFSET);
214 writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_CLKEN_MASK,
215 dev->base + CLKEN_OFFSET);
221 uint32_t status = readl(dev->base + ISR_OFFSET);
229 dev->base + TXFCR_OFFSET);
231 writel(status & ~ISR_RESERVED_MASK, dev->base + ISR_OFFSET);
242 while (readl(dev->base + ISR_OFFSET) & ISR_CMDBUSY_MASK)
264 writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET);
276 writel(0, dev->base + IER_OFFSET);
300 writel(IER_READ_COMPLETE_INT_MASK, dev->base + IER_OFFSET);
305 dev->base + RXFCR_OFFSET);
311 writel(0, dev->base + IER_OFFSET);
320 *buf = readl(dev->base + RXFIFORDOUT_OFFSET);
368 writel(ISR_SES_DONE_MASK, dev->base + ISR_OFFSET);
371 writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET);
377 writel(data, dev->base + DAT_OFFSET);
383 writel(0, dev->base + IER_OFFSET);
390 nak_received = readl(dev->base + CS_OFFSET) & CS_ACK_MASK ? 1 : 0;
413 dev->base + IER_OFFSET);
420 writel(buf[k], (dev->base + DAT_OFFSET));
428 fifo_status = readl(dev->base + FIFO_STATUS_OFFSET);
432 writel(0, dev->base + IER_OFFSET);
435 if (readl(dev->base + CS_OFFSET) & CS_ACK_MASK) {
515 writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_AUTOSENSE_OFF_MASK,
516 dev->base + CLKEN_OFFSET);
521 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK,
522 dev->base + HSTIM_OFFSET);
528 dev->base + TIM_OFFSET);
533 dev->base + CLKEN_OFFSET);
542 dev->base + TIM_OFFSET);
547 dev->base + HSTIM_OFFSET);
549 writel(readl(dev->base + HSTIM_OFFSET) | HSTIM_HS_MODE_MASK,
550 dev->base + HSTIM_OFFSET);
617 writel(0, dev->base + PADCTL_OFFSET);
693 writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET);
764 dev->base = devm_platform_ioremap_resource(pdev, 0);
765 if (IS_ERR(dev->base))
800 writel(0, dev->base + TOUT_OFFSET);
807 dev->base + TXFCR_OFFSET);
810 writel(0, dev->base + IER_OFFSET);
819 dev->base + ISR_OFFSET);
840 writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET);