Lines Matching refs:dev
34 void at91_init_twi_bus_master(struct at91_twi_dev *dev)
36 struct at91_twi_pdata *pdata = dev->pdata;
40 if (dev->fifo_size)
41 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_FIFOEN);
42 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_MSEN);
43 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SVDIS);
44 at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg);
47 if (pdata->has_dig_filtr && dev->enable_dig_filt)
51 if (pdata->has_adv_dig_filtr && dev->enable_dig_filt)
53 (AT91_TWI_FILTR_THRES(dev->filter_width) &
57 if (pdata->has_ana_filtr && dev->enable_ana_filt)
61 at91_twi_write(dev, AT91_TWI_FILTR, filtr);
68 static void at91_calc_twi_clock(struct at91_twi_dev *dev)
71 struct at91_twi_pdata *pdata = dev->pdata;
76 i2c_parse_fw_timings(dev->dev, t, true);
78 div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),
84 dev_warn(dev->dev, "%d exceeds ckdiv max value which is %d.\n",
97 * (clk_get_rate(dev->clk) / 1000), 1000000);
102 dev_warn(dev->dev,
115 * (clk_get_rate(dev->clk) / 1000), 1000000);
117 dev_warn(dev->dev,
124 dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv
127 dev->filter_width = filter_width;
129 dev_dbg(dev->dev, "cdiv %d ckdiv %d hold %d (%d ns), filter_width %d (%d ns)\n",
134 static void at91_twi_dma_cleanup(struct at91_twi_dev *dev)
136 struct at91_twi_dma *dma = &dev->dma;
138 at91_twi_irq_save(dev);
148 dma_unmap_single(dev->dev, sg_dma_address(&dma->sg[0]),
149 dev->buf_len, dma->direction);
153 at91_twi_irq_restore(dev);
156 static void at91_twi_write_next_byte(struct at91_twi_dev *dev)
158 if (!dev->buf_len)
162 writeb_relaxed(*dev->buf, dev->base + AT91_TWI_THR);
165 if (--dev->buf_len == 0) {
166 if (!dev->use_alt_cmd)
167 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
168 at91_twi_write(dev, AT91_TWI_IDR, AT91_TWI_TXRDY);
171 dev_dbg(dev->dev, "wrote 0x%x, to go %zu\n", *dev->buf, dev->buf_len);
173 ++dev->buf;
178 struct at91_twi_dev *dev = (struct at91_twi_dev *)data;
180 dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg[0]),
181 dev->buf_len, DMA_TO_DEVICE);
190 at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP);
191 if (!dev->use_alt_cmd)
192 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
195 static void at91_twi_write_data_dma(struct at91_twi_dev *dev)
199 struct at91_twi_dma *dma = &dev->dma;
203 if (!dev->buf_len)
208 at91_twi_irq_save(dev);
209 dma_addr = dma_map_single(dev->dev, dev->buf, dev->buf_len,
211 if (dma_mapping_error(dev->dev, dma_addr)) {
212 dev_err(dev->dev, "dma map failed\n");
216 at91_twi_irq_restore(dev);
218 if (dev->fifo_size) {
225 part1_len = dev->buf_len & ~0x3;
232 part2_len = dev->buf_len & 0x3;
243 fifo_mr = at91_twi_read(dev, AT91_TWI_FMR);
246 at91_twi_write(dev, AT91_TWI_FMR, fifo_mr);
248 sg_dma_len(&dma->sg[0]) = dev->buf_len;
256 dev_err(dev->dev, "dma prep slave sg failed\n");
261 txdesc->callback_param = dev;
270 at91_twi_dma_cleanup(dev);
273 static void at91_twi_read_next_byte(struct at91_twi_dev *dev)
279 if (!dev->buf_len) {
280 at91_twi_read(dev, AT91_TWI_RHR);
285 *dev->buf = readb_relaxed(dev->base + AT91_TWI_RHR);
286 --dev->buf_len;
289 if (dev->recv_len_abort)
293 if (unlikely(dev->msg->flags & I2C_M_RECV_LEN)) {
295 if (*dev->buf <= I2C_SMBUS_BLOCK_MAX && *dev->buf > 0) {
296 dev->msg->flags &= ~I2C_M_RECV_LEN;
297 dev->buf_len += *dev->buf;
298 dev->msg->len = dev->buf_len + 1;
299 dev_dbg(dev->dev, "received block length %zu\n",
300 dev->buf_len);
303 dev->recv_len_abort = true;
304 dev->buf_len = 1;
309 if (!dev->use_alt_cmd && dev->buf_len == 1)
310 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
312 dev_dbg(dev->dev, "read 0x%x, to go %zu\n", *dev->buf, dev->buf_len);
314 ++dev->buf;
319 struct at91_twi_dev *dev = (struct at91_twi_dev *)data;
322 dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg[0]),
323 dev->buf_len, DMA_FROM_DEVICE);
325 if (!dev->use_alt_cmd) {
327 dev->buf += dev->buf_len - 2;
328 dev->buf_len = 2;
331 at91_twi_write(dev, AT91_TWI_IER, ier);
334 static void at91_twi_read_data_dma(struct at91_twi_dev *dev)
338 struct at91_twi_dma *dma = &dev->dma;
342 buf_len = (dev->use_alt_cmd) ? dev->buf_len : dev->buf_len - 2;
346 at91_twi_irq_save(dev);
347 dma_addr = dma_map_single(dev->dev, dev->buf, buf_len, DMA_FROM_DEVICE);
348 if (dma_mapping_error(dev->dev, dma_addr)) {
349 dev_err(dev->dev, "dma map failed\n");
353 at91_twi_irq_restore(dev);
355 if (dev->fifo_size && IS_ALIGNED(buf_len, 4)) {
362 fifo_mr = at91_twi_read(dev, AT91_TWI_FMR);
365 at91_twi_write(dev, AT91_TWI_FMR, fifo_mr);
374 dev_err(dev->dev, "dma prep slave sg failed\n");
379 rxdesc->callback_param = dev;
388 at91_twi_dma_cleanup(dev);
393 struct at91_twi_dev *dev = dev_id;
394 const unsigned status = at91_twi_read(dev, AT91_TWI_SR);
395 const unsigned irqstatus = status & at91_twi_read(dev, AT91_TWI_IMR);
422 at91_twi_read_next_byte(dev);
423 } while (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY);
465 at91_disable_twi_interrupts(dev);
466 complete(&dev->cmd_complete);
468 at91_twi_write_next_byte(dev);
472 dev->transfer_status |= status;
477 static int at91_do_twi_transfer(struct at91_twi_dev *dev)
481 bool has_unre_flag = dev->pdata->has_unre_flag;
482 bool has_alt_cmd = dev->pdata->has_alt_cmd;
527 dev_dbg(dev->dev, "transfer: %s %zu bytes.\n",
528 (dev->msg->flags & I2C_M_RD) ? "read" : "write", dev->buf_len);
530 reinit_completion(&dev->cmd_complete);
531 dev->transfer_status = 0;
534 at91_twi_read(dev, AT91_TWI_SR);
536 if (dev->fifo_size) {
537 unsigned fifo_mr = at91_twi_read(dev, AT91_TWI_FMR);
544 at91_twi_write(dev, AT91_TWI_FMR, fifo_mr);
547 at91_twi_write(dev, AT91_TWI_CR,
551 if (!dev->buf_len) {
552 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_QUICK);
553 at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP);
554 } else if (dev->msg->flags & I2C_M_RD) {
558 if (!dev->use_alt_cmd && dev->buf_len <= 1 &&
559 !(dev->msg->flags & I2C_M_RECV_LEN))
561 at91_twi_write(dev, AT91_TWI_CR, start_flags);
571 if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) {
572 at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_NACK);
573 at91_twi_read_data_dma(dev);
575 at91_twi_write(dev, AT91_TWI_IER,
581 if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) {
582 at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_NACK);
583 at91_twi_write_data_dma(dev);
585 at91_twi_write_next_byte(dev);
586 at91_twi_write(dev, AT91_TWI_IER,
588 (dev->buf_len ? AT91_TWI_TXRDY : 0));
592 time_left = wait_for_completion_timeout(&dev->cmd_complete,
593 dev->adapter.timeout);
595 dev->transfer_status |= at91_twi_read(dev, AT91_TWI_SR);
596 dev_err(dev->dev, "controller timed out\n");
597 at91_init_twi_bus(dev);
601 if (dev->transfer_status & AT91_TWI_NACK) {
602 dev_dbg(dev->dev, "received nack\n");
606 if (dev->transfer_status & AT91_TWI_OVRE) {
607 dev_err(dev->dev, "overrun while reading\n");
611 if (has_unre_flag && dev->transfer_status & AT91_TWI_UNRE) {
612 dev_err(dev->dev, "underrun while writing\n");
616 if ((has_alt_cmd || dev->fifo_size) &&
617 (dev->transfer_status & AT91_TWI_LOCK)) {
618 dev_err(dev->dev, "tx locked\n");
622 if (dev->recv_len_abort) {
623 dev_err(dev->dev, "invalid smbus block length recvd\n");
628 dev_dbg(dev->dev, "transfer complete\n");
634 at91_twi_dma_cleanup(dev);
636 if ((has_alt_cmd || dev->fifo_size) &&
637 (dev->transfer_status & AT91_TWI_LOCK)) {
638 dev_dbg(dev->dev, "unlock tx\n");
639 at91_twi_write(dev, AT91_TWI_CR,
648 i2c_recover_bus(&dev->adapter);
655 struct at91_twi_dev *dev = i2c_get_adapdata(adap);
662 dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
664 ret = pm_runtime_get_sync(dev->dev);
680 at91_twi_write(dev, AT91_TWI_IADR, internal_address);
683 dev->use_alt_cmd = false;
685 if (dev->pdata->has_alt_cmd) {
688 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_ACMEN);
689 at91_twi_write(dev, AT91_TWI_ACR,
692 dev->use_alt_cmd = true;
694 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_ACMDIS);
698 at91_twi_write(dev, AT91_TWI_MMR,
701 ((!dev->use_alt_cmd && is_read) ? AT91_TWI_MREAD : 0));
703 dev->buf_len = m_start->len;
704 dev->buf = m_start->buf;
705 dev->msg = m_start;
706 dev->recv_len_abort = false;
708 if (dev->use_dma) {
714 dev->buf = dma_buf;
717 ret = at91_do_twi_transfer(dev);
722 pm_runtime_mark_last_busy(dev->dev);
723 pm_runtime_put_autosuspend(dev->dev);
748 static int at91_twi_configure_dma(struct at91_twi_dev *dev, u32 phy_addr)
752 struct at91_twi_dma *dma = &dev->dma;
770 if (dev->fifo_size)
782 dma->chan_tx = dma_request_chan(dev->dev, "tx");
789 dma->chan_rx = dma_request_chan(dev->dev, "rx");
798 dev_err(dev->dev, "failed to configure tx channel\n");
805 dev_err(dev->dev, "failed to configure rx channel\n");
813 dev->use_dma = true;
815 dev_info(dev->dev, "using %s (tx) and %s (rx) for DMA transfers\n",
822 dev_info(dev->dev, "can't get DMA channel, continue without DMA support\n");
831 struct at91_twi_dev *dev)
833 struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
835 rinfo->pinctrl = devm_pinctrl_get(&pdev->dev);
837 dev_info(dev->dev, "can't get pinctrl, bus recovery not supported\n");
840 dev->adapter.bus_recovery_info = rinfo;
847 struct at91_twi_dev *dev = i2c_get_adapdata(adap);
849 dev->transfer_status |= at91_twi_read(dev, AT91_TWI_SR);
850 if (!(dev->transfer_status & AT91_TWI_SDA)) {
851 dev_dbg(dev->dev, "SDA is down; sending bus clear command\n");
852 if (dev->use_alt_cmd) {
855 acr = at91_twi_read(dev, AT91_TWI_ACR);
857 at91_twi_write(dev, AT91_TWI_ACR, acr);
859 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_CLEAR);
866 struct at91_twi_dev *dev)
868 struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
869 bool has_clear_cmd = dev->pdata->has_clear_cmd;
872 return at91_init_twi_recovery_gpio(pdev, dev);
875 dev->adapter.bus_recovery_info = rinfo;
881 u32 phy_addr, struct at91_twi_dev *dev)
885 init_completion(&dev->cmd_complete);
887 rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0,
888 dev_name(dev->dev), dev);
890 dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc);
894 if (dev->dev->of_node) {
895 rc = at91_twi_configure_dma(dev, phy_addr);
900 if (!of_property_read_u32(pdev->dev.of_node, "atmel,fifo-size",
901 &dev->fifo_size)) {
902 dev_info(dev->dev, "Using FIFO (%u data)\n", dev->fifo_size);
905 dev->enable_dig_filt = of_property_read_bool(pdev->dev.of_node,
908 dev->enable_ana_filt = of_property_read_bool(pdev->dev.of_node,
910 at91_calc_twi_clock(dev);
912 rc = at91_init_twi_recovery_info(pdev, dev);
916 dev->adapter.algo = &at91_twi_algorithm;
917 dev->adapter.quirks = &at91_twi_quirks;