Lines Matching refs:base
146 void __iomem *base;
148 /* Synchronizes I/O mem access to base. */
182 command = readl(bus->base + ASPEED_I2C_CMD_REG);
192 writel(ASPEED_I2CD_M_STOP_CMD, bus->base + ASPEED_I2C_CMD_REG);
204 else if (!(readl(bus->base + ASPEED_I2C_CMD_REG) &
215 bus->base + ASPEED_I2C_CMD_REG);
227 else if (!(readl(bus->base + ASPEED_I2C_CMD_REG) &
292 command = readl(bus->base + ASPEED_I2C_CMD_REG);
298 value = readl(bus->base + ASPEED_I2C_BYTE_BUF_REG) >> 8;
317 writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG);
318 writel(ASPEED_I2CD_S_TX_CMD, bus->base + ASPEED_I2C_CMD_REG);
328 writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG);
329 writel(ASPEED_I2CD_S_TX_CMD, bus->base + ASPEED_I2C_CMD_REG);
384 writel(slave_addr, bus->base + ASPEED_I2C_BYTE_BUF_REG);
385 writel(command, bus->base + ASPEED_I2C_CMD_REG);
392 writel(ASPEED_I2CD_M_STOP_CMD, bus->base + ASPEED_I2C_CMD_REG);
481 writel(readl(bus->base + ASPEED_I2C_CMD_REG) &
483 bus->base + ASPEED_I2C_CMD_REG);
529 bus->base + ASPEED_I2C_BYTE_BUF_REG);
531 bus->base + ASPEED_I2C_CMD_REG);
548 recv_byte = readl(bus->base + ASPEED_I2C_BYTE_BUF_REG) >> 8;
567 writel(command, bus->base + ASPEED_I2C_CMD_REG);
619 irq_received = readl(bus->base + ASPEED_I2C_INTR_STS_REG);
622 bus->base + ASPEED_I2C_INTR_STS_REG);
623 readl(bus->base + ASPEED_I2C_INTR_STS_REG);
669 bus->base + ASPEED_I2C_INTR_STS_REG);
670 readl(bus->base + ASPEED_I2C_INTR_STS_REG);
687 (readl(bus->base + ASPEED_I2C_CMD_REG) &
717 (readl(bus->base + ASPEED_I2C_CMD_REG) &
750 addr_reg_val = readl(bus->base + ASPEED_I2C_DEV_ADDR_REG);
753 writel(addr_reg_val, bus->base + ASPEED_I2C_DEV_ADDR_REG);
756 func_ctrl_reg_val = readl(bus->base + ASPEED_I2C_FUN_CTRL_REG);
758 writel(func_ctrl_reg_val, bus->base + ASPEED_I2C_FUN_CTRL_REG);
795 func_ctrl_reg_val = readl(bus->base + ASPEED_I2C_FUN_CTRL_REG);
797 writel(func_ctrl_reg_val, bus->base + ASPEED_I2C_FUN_CTRL_REG);
906 clk_reg_val = readl(bus->base + ASPEED_I2C_AC_TIMING_REG1);
911 writel(clk_reg_val, bus->base + ASPEED_I2C_AC_TIMING_REG1);
912 writel(ASPEED_NO_TIMEOUT_CTRL, bus->base + ASPEED_I2C_AC_TIMING_REG2);
925 writel(0, bus->base + ASPEED_I2C_FUN_CTRL_REG);
937 writel(readl(bus->base + ASPEED_I2C_FUN_CTRL_REG) | fun_ctrl_reg,
938 bus->base + ASPEED_I2C_FUN_CTRL_REG);
947 writel(ASPEED_I2CD_INTR_ALL, bus->base + ASPEED_I2C_INTR_CTRL_REG);
961 writel(0, bus->base + ASPEED_I2C_INTR_CTRL_REG);
962 writel(0xffffffff, bus->base + ASPEED_I2C_INTR_STS_REG);
1001 bus->base = devm_ioremap_resource(&pdev->dev, res);
1002 if (IS_ERR(bus->base))
1003 return PTR_ERR(bus->base);
1049 writel(0, bus->base + ASPEED_I2C_INTR_CTRL_REG);
1050 writel(0xffffffff, bus->base + ASPEED_I2C_INTR_STS_REG);
1085 writel(0, bus->base + ASPEED_I2C_FUN_CTRL_REG);
1086 writel(0, bus->base + ASPEED_I2C_INTR_CTRL_REG);