Lines Matching refs:W83781D_ADDR_REG_OFFSET
71 #define W83781D_ADDR_REG_OFFSET 5
1662 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1666 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1670 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1677 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1694 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1698 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1703 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1708 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1760 res->start + W83781D_ADDR_REG_OFFSET, 2,
1867 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1873 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1874 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1875 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1881 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1887 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1889 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1896 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1904 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1910 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1913 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);