Lines Matching defs:w83781d_write_value
241 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
272 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
329 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
379 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
383 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
504 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
506 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
509 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
556 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
563 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
570 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
662 w83781d_write_value(data, nr == 2 ?
670 w83781d_write_value(data, W83781D_REG_VBAT, reg);
675 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
719 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
743 w83781d_write_value(data, W83781D_REG_PWMCLK12,
747 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
797 w83781d_write_value(data, W83781D_REG_SCFG1,
800 w83781d_write_value(data, W83781D_REG_SCFG2,
806 w83781d_write_value(data, W83781D_REG_SCFG1,
809 w83781d_write_value(data, W83781D_REG_SCFG2,
820 w83781d_write_value(data, W83781D_REG_SCFG1,
870 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
1364 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1369 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1370 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1376 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1385 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1414 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1425 w83781d_write_value(data,
1432 w83781d_write_value(data, W83781D_REG_CONFIG,
1737 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
2026 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)