Lines Matching defs:val
100 superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
103 outb(val, sio->sioaddr + 1);
250 #define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
251 #define IN_FROM_REG(val) ((val) * 16)
280 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
282 #define PWM_TO_REG(val) (clamp_val((val), 0, 255))
290 static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
298 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
316 static inline u8 pwm_freq_to_reg(unsigned long val)
319 if (val >= 93750) /* The highest we can do */
321 if (val >= 720) /* Use 24 MHz clock */
322 return 24000000UL / (val << 8);
323 if (val < 6) /* The lowest we can do */
326 return 0x80 | (180000UL / (val << 8));
329 #define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
330 #define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
332 #define DIV_FROM_REG(val) (1 << (val))
334 static inline u8 DIV_TO_REG(long val)
337 val = clamp_val(val, 1, 128) >> 1;
339 if (val == 0)
341 val >>= 1;
503 long val;
506 err = kstrtol(buf, 10, &val);
511 data->in_min[nr] = IN_TO_REG(val);
522 long val;
525 err = kstrtol(buf, 10, &val);
530 data->in_max[nr] = IN_TO_REG(val);
605 unsigned long val;
608 err = kstrtoul(buf, 10, &val);
620 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
623 data->in_min[0] = IN_TO_REG(val);
635 unsigned long val;
638 err = kstrtoul(buf, 10, &val);
650 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
653 data->in_max[0] = IN_TO_REG(val);
687 unsigned long val;
690 err = kstrtoul(buf, 10, &val);
695 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
751 long val;
754 err = kstrtol(buf, 10, &val);
758 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
773 long val;
776 err = kstrtol(buf, 10, &val);
780 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
817 unsigned long val;
820 err = kstrtoul(buf, 10, &val);
824 if (val > 255)
826 data->vrm = val;
876 unsigned long val;
879 err = kstrtoul(buf, 10, &val);
887 | BEEP_MASK_TO_REG(val);
998 unsigned long val;
1001 err = kstrtoul(buf, 10, &val);
1011 data->fan_div[nr] = DIV_TO_REG(val);
1049 unsigned long val;
1052 err = kstrtoul(buf, 10, &val);
1060 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
1067 data->pwm[nr] = PWM_TO_REG(val);
1097 unsigned long val;
1100 err = kstrtoul(buf, 10, &val);
1104 if (!val || val > 3) /* modes 1, 2 and 3 are supported */
1107 data->pwm_enable[nr] = val;
1110 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
1140 unsigned long val;
1143 err = kstrtoul(buf, 10, &val);
1150 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1156 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1184 unsigned long val;
1188 err = kstrtoul(buf, 10, &val);
1194 switch (val) {
1202 data->sens[nr] = val;
1211 data->sens[nr] = val;
1221 data->sens[nr] = val;
1226 (long) val);
1251 u16 val;
1267 val = force_id ? force_id : superio_inb(sio_data, DEVID);
1268 switch (val) {
1287 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
1292 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1294 *addr = val & WINB_ALIGNMENT;
1300 val = superio_inb(sio_data, WINB_ACT_REG);
1301 if (!(val & 0x01)) {
1303 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);