Lines Matching refs:data
54 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
83 #define SIO_REG_VID_DATA 0xF1 /* VID data */
394 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
397 if (data->bank != bank) {
398 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
399 outb_p(bank, data->addr + DATA_REG_OFFSET);
400 data->bank = bank;
404 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
408 mutex_lock(&data->lock);
410 w83627ehf_set_bank(data, reg);
411 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
412 res = inb_p(data->addr + DATA_REG_OFFSET);
415 data->addr + ADDR_REG_OFFSET);
416 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
419 mutex_unlock(&data->lock);
423 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
428 mutex_lock(&data->lock);
430 w83627ehf_set_bank(data, reg);
431 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
433 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
435 data->addr + ADDR_REG_OFFSET);
437 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
439 mutex_unlock(&data->lock);
444 static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
448 res = w83627ehf_read_value(data, reg);
455 static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
460 return w83627ehf_write_value(data, reg, value);
463 /* This function assumes that the caller holds data->update_lock */
464 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
470 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
471 | ((data->fan_div[0] & 0x03) << 4);
473 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
474 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
475 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
476 | ((data->fan_div[0] & 0x04) << 3);
477 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
480 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
481 | ((data->fan_div[1] & 0x03) << 6);
483 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
484 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
485 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
486 | ((data->fan_div[1] & 0x04) << 4);
487 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
490 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
491 | ((data->fan_div[2] & 0x03) << 6);
492 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
493 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
494 | ((data->fan_div[2] & 0x04) << 5);
495 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
498 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
499 | (data->fan_div[3] & 0x03);
500 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
501 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
502 | ((data->fan_div[3] & 0x04) << 5);
503 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
506 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
507 | ((data->fan_div[4] & 0x03) << 2)
508 | ((data->fan_div[4] & 0x04) << 5);
509 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
514 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
518 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
519 data->fan_div[0] = (i >> 4) & 0x03;
520 data->fan_div[1] = (i >> 6) & 0x03;
521 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
522 data->fan_div[2] = (i >> 6) & 0x03;
523 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
524 data->fan_div[0] |= (i >> 3) & 0x04;
525 data->fan_div[1] |= (i >> 4) & 0x04;
526 data->fan_div[2] |= (i >> 5) & 0x04;
527 if (data->has_fan & ((1 << 3) | (1 << 4))) {
528 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
529 data->fan_div[3] = i & 0x03;
530 data->fan_div[4] = ((i >> 2) & 0x03)
533 if (data->has_fan & (1 << 3)) {
534 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
535 data->fan_div[3] |= (i >> 5) & 0x04;
539 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
544 for (i = 0; i < data->pwm_num; i++) {
545 if (!(data->has_fan & (1 << i)))
550 pwmcfg = w83627ehf_read_value(data,
552 tolerance = w83627ehf_read_value(data,
555 data->pwm_mode[i] =
557 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
559 data->pwm[i] = w83627ehf_read_value(data, W83627EHF_REG_PWM[i]);
561 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
567 struct w83627ehf_data *data = dev_get_drvdata(dev);
570 mutex_lock(&data->update_lock);
572 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
573 || !data->valid) {
575 w83627ehf_update_fan_div(data);
578 for (i = 0; i < data->in_num; i++) {
579 if ((i == 6) && data->in6_skip)
582 data->in[i] = w83627ehf_read_value(data,
584 data->in_min[i] = w83627ehf_read_value(data,
586 data->in_max[i] = w83627ehf_read_value(data,
594 if (!(data->has_fan & (1 << i)))
597 reg = w83627ehf_read_value(data, W83627EHF_REG_FAN[i]);
598 data->rpm[i] = fan_from_reg8(reg, data->fan_div[i]);
600 if (data->has_fan_min & (1 << i))
601 data->fan_min[i] = w83627ehf_read_value(data,
609 if (reg >= 0xff && data->fan_div[i] < 0x07) {
612 i + 1, div_from_reg(data->fan_div[i]),
613 div_from_reg(data->fan_div[i] + 1));
614 data->fan_div[i]++;
615 w83627ehf_write_fan_div(data, i);
617 if ((data->has_fan_min & (1 << i))
618 && data->fan_min[i] >= 2
619 && data->fan_min[i] != 255)
620 w83627ehf_write_value(data,
622 (data->fan_min[i] /= 2));
626 w83627ehf_update_pwm(data);
628 for (i = 0; i < data->pwm_num; i++) {
629 if (!(data->has_fan & (1 << i)))
632 data->fan_start_output[i] =
633 w83627ehf_read_value(data,
635 data->fan_stop_output[i] =
636 w83627ehf_read_value(data,
638 data->fan_stop_time[i] =
639 w83627ehf_read_value(data,
642 if (data->REG_FAN_MAX_OUTPUT &&
643 data->REG_FAN_MAX_OUTPUT[i] != 0xff)
644 data->fan_max_output[i] =
645 w83627ehf_read_value(data,
646 data->REG_FAN_MAX_OUTPUT[i]);
648 if (data->REG_FAN_STEP_OUTPUT &&
649 data->REG_FAN_STEP_OUTPUT[i] != 0xff)
650 data->fan_step_output[i] =
651 w83627ehf_read_value(data,
652 data->REG_FAN_STEP_OUTPUT[i]);
654 data->target_temp[i] =
655 w83627ehf_read_value(data,
657 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
662 if (!(data->have_temp & (1 << i)))
664 data->temp[i] = w83627ehf_read_temp(data,
665 data->reg_temp[i]);
666 if (data->reg_temp_over[i])
667 data->temp_max[i]
668 = w83627ehf_read_temp(data,
669 data->reg_temp_over[i]);
670 if (data->reg_temp_hyst[i])
671 data->temp_max_hyst[i]
672 = w83627ehf_read_temp(data,
673 data->reg_temp_hyst[i]);
676 if (data->have_temp_offset & (1 << i))
677 data->temp_offset[i]
678 = w83627ehf_read_value(data,
682 data->alarms = w83627ehf_read_value(data,
684 (w83627ehf_read_value(data,
686 (w83627ehf_read_value(data,
689 data->caseopen = w83627ehf_read_value(data,
692 data->last_updated = jiffies;
693 data->valid = 1;
696 mutex_unlock(&data->update_lock);
697 return data;
702 store_in_##reg(struct device *dev, struct w83627ehf_data *data, int channel, \
707 mutex_lock(&data->update_lock); \
708 data->in_##reg[channel] = in_to_reg(val, channel, data->scale_in); \
709 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(channel), \
710 data->in_##reg[channel]); \
711 mutex_unlock(&data->update_lock); \
719 store_fan_min(struct device *dev, struct w83627ehf_data *data, int channel,
728 mutex_lock(&data->update_lock);
731 data->fan_min[channel] = 255;
732 new_div = data->fan_div[channel]; /* No change */
740 data->fan_min[channel] = 254;
750 data->fan_min[channel] = 1;
766 data->fan_min[channel] = reg;
773 if (new_div != data->fan_div[channel]) {
775 channel + 1, div_from_reg(data->fan_div[channel]),
777 data->fan_div[channel] = new_div;
778 w83627ehf_write_fan_div(data, channel);
780 data->last_updated = jiffies;
783 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[channel],
784 data->fan_min[channel]);
785 mutex_unlock(&data->update_lock);
792 store_##reg(struct device *dev, struct w83627ehf_data *data, int channel, \
795 mutex_lock(&data->update_lock); \
796 data->reg[channel] = LM75_TEMP_TO_REG(val); \
797 w83627ehf_write_temp(data, data->addr[channel], data->reg[channel]); \
798 mutex_unlock(&data->update_lock); \
805 store_temp_offset(struct device *dev, struct w83627ehf_data *data, int channel,
810 mutex_lock(&data->update_lock);
811 data->temp_offset[channel] = val;
812 w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[channel], val);
813 mutex_unlock(&data->update_lock);
818 store_pwm_mode(struct device *dev, struct w83627ehf_data *data, int channel,
826 mutex_lock(&data->update_lock);
827 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[channel]);
828 data->pwm_mode[channel] = val;
832 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[channel], reg);
833 mutex_unlock(&data->update_lock);
838 store_pwm(struct device *dev, struct w83627ehf_data *data, int channel,
843 mutex_lock(&data->update_lock);
844 data->pwm[channel] = val;
845 w83627ehf_write_value(data, W83627EHF_REG_PWM[channel], val);
846 mutex_unlock(&data->update_lock);
851 store_pwm_enable(struct device *dev, struct w83627ehf_data *data, int channel,
857 (val > 4 && val != data->pwm_enable_orig[channel]))
860 mutex_lock(&data->update_lock);
861 data->pwm_enable[channel] = val;
862 reg = w83627ehf_read_value(data,
866 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[channel],
868 mutex_unlock(&data->update_lock);
876 struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
880 return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
890 struct w83627ehf_data *data = dev_get_drvdata(dev);
902 mutex_lock(&data->update_lock);
903 data->target_temp[nr] = val;
904 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
905 mutex_unlock(&data->update_lock);
913 struct w83627ehf_data *data = dev_get_drvdata(dev);
927 mutex_lock(&data->update_lock);
928 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
933 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
934 data->tolerance[nr] = val;
935 mutex_unlock(&data->update_lock);
963 struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
967 return sprintf(buf, "%d\n", data->reg[nr]); \
973 struct w83627ehf_data *data = dev_get_drvdata(dev); \
983 mutex_lock(&data->update_lock); \
984 data->reg[nr] = val; \
985 w83627ehf_write_value(data, REG[nr], val); \
986 mutex_unlock(&data->update_lock); \
992 fan_functions(fan_max_output, data->REG_FAN_MAX_OUTPUT)
993 fan_functions(fan_step_output, data->REG_FAN_STEP_OUTPUT)
999 struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
1004 step_time_from_reg(data->reg[nr], \
1005 data->pwm_mode[nr])); \
1012 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1021 val = step_time_to_reg(val, data->pwm_mode[nr]); \
1022 mutex_lock(&data->update_lock); \
1023 data->reg[nr] = val; \
1024 w83627ehf_write_value(data, REG[nr], val); \
1025 mutex_unlock(&data->update_lock); \
1083 struct w83627ehf_data *data = dev_get_drvdata(dev);
1084 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1091 clear_caseopen(struct device *dev, struct w83627ehf_data *data, int channel,
1100 mutex_lock(&data->update_lock);
1101 reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1102 w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1103 w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1104 data->valid = 0; /* Force cache refresh */
1105 mutex_unlock(&data->update_lock);
1114 struct w83627ehf_data *data = dev_get_drvdata(dev);
1121 if (devattr->show == cpu0_vid_show && data->have_vid)
1135 data->REG_FAN_STEP_OUTPUT &&
1136 data->REG_FAN_STEP_OUTPUT[sda->index] != 0xff)
1141 (data->has_fan & (1 << 2)) && data->pwm_num >= 3 &&
1148 (data->has_fan & (1 << 3)) && data->pwm_num >= 4 &&
1158 (data->has_fan & (1 << sda->index)) &&
1159 sda->index < data->pwm_num)
1219 static inline void w83627ehf_init_device(struct w83627ehf_data *data,
1226 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1228 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1233 if (!(data->have_temp & (1 << i)))
1235 if (!data->reg_temp_config[i])
1237 tmp = w83627ehf_read_value(data,
1238 data->reg_temp_config[i]);
1240 w83627ehf_write_value(data,
1241 data->reg_temp_config[i],
1246 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1248 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1253 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1264 if (data->temp_label)
1265 label = data->temp_label[data->temp_src[i]];
1269 data->temp_type[i] = 6;
1271 data->temp_type[i] = 5;
1273 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1275 data->temp_type[i] = 4; /* thermistor */
1280 w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
1285 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1286 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1287 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1288 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1294 struct w83627ehf_data *data)
1300 data->has_fan = 0x03; /* fan1 and fan2 */
1301 data->has_fan_min = 0x03;
1316 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
1317 data->has_fan |= (fan3pin << 2);
1318 data->has_fan_min |= (fan3pin << 2);
1327 regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1329 data->has_fan |= (1 << 3);
1330 data->has_fan_min |= (1 << 3);
1333 data->has_fan |= (1 << 4);
1334 data->has_fan_min |= (1 << 4);
1342 const struct w83627ehf_data *data = drvdata;
1347 if (!(data->have_temp & (1 << channel)))
1352 if (data->temp_label)
1356 if (channel == 2 && data->temp3_val_only)
1359 if (data->reg_temp_over[channel])
1365 if (data->reg_temp_hyst[channel])
1375 if (data->have_temp_offset & (1 << channel))
1384 if (!(data->has_fan & (1 << channel)))
1392 if (data->has_fan_min & (1 << channel))
1401 if (channel >= data->in_num)
1403 if (channel == 6 && data->in6_skip)
1413 if (!(data->has_fan & (1 << channel)) ||
1414 channel >= data->pwm_num)
1432 w83627ehf_do_read_temp(struct w83627ehf_data *data, u32 attr,
1437 *val = LM75_TEMP_FROM_REG(data->temp[channel]);
1440 *val = LM75_TEMP_FROM_REG(data->temp_max[channel]);
1443 *val = LM75_TEMP_FROM_REG(data->temp_max_hyst[channel]);
1446 *val = data->temp_offset[channel] * 1000;
1449 *val = (int)data->temp_type[channel];
1454 *val = (data->alarms >> bit[channel]) & 1;
1467 w83627ehf_do_read_in(struct w83627ehf_data *data, u32 attr,
1472 *val = in_from_reg(data->in[channel], channel, data->scale_in);
1475 *val = in_from_reg(data->in_min[channel], channel,
1476 data->scale_in);
1479 *val = in_from_reg(data->in_max[channel], channel,
1480 data->scale_in);
1485 *val = (data->alarms >> bit[channel]) & 1;
1496 w83627ehf_do_read_fan(struct w83627ehf_data *data, u32 attr,
1501 *val = data->rpm[channel];
1504 *val = fan_from_reg8(data->fan_min[channel],
1505 data->fan_div[channel]);
1508 *val = div_from_reg(data->fan_div[channel]);
1513 *val = (data->alarms >> bit[channel]) & 1;
1524 w83627ehf_do_read_pwm(struct w83627ehf_data *data, u32 attr,
1529 *val = data->pwm[channel];
1532 *val = data->pwm_enable[channel];
1535 *val = data->pwm_enable[channel];
1544 w83627ehf_do_read_intrusion(struct w83627ehf_data *data, u32 attr,
1550 *val = !!(data->caseopen & 0x10);
1558 struct w83627ehf_data *data = w83627ehf_update_device(dev->parent);
1562 return w83627ehf_do_read_fan(data, attr, channel, val);
1565 return w83627ehf_do_read_in(data, attr, channel, val);
1568 return w83627ehf_do_read_pwm(data, attr, channel, val);
1571 return w83627ehf_do_read_temp(data, attr, channel, val);
1574 return w83627ehf_do_read_intrusion(data, attr, channel, val);
1587 struct w83627ehf_data *data = dev_get_drvdata(dev);
1592 *str = data->temp_label[data->temp_src[channel]];
1608 struct w83627ehf_data *data = dev_get_drvdata(dev);
1611 return store_in_min(dev, data, channel, val);
1613 return store_in_max(dev, data, channel, val);
1616 return store_fan_min(dev, data, channel, val);
1619 return store_temp_max(dev, data, channel, val);
1621 return store_temp_max_hyst(dev, data, channel, val);
1623 return store_temp_offset(dev, data, channel, val);
1626 return store_pwm_mode(dev, data, channel, val);
1628 return store_pwm_enable(dev, data, channel, val);
1630 return store_pwm(dev, data, channel, val);
1633 return clear_caseopen(dev, data, channel, val);
1701 struct w83627ehf_data *data;
1716 data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),
1718 if (!data) {
1723 data->addr = res->start;
1724 mutex_init(&data->lock);
1725 mutex_init(&data->update_lock);
1726 data->name = w83627ehf_device_names[sio_data->kind];
1727 data->bank = 0xff; /* Force initial bank selection */
1728 platform_set_drvdata(pdev, data);
1731 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1735 data->pwm_num = 4;
1739 data->pwm_num = 3;
1742 data->pwm_num = 2;
1747 data->have_temp = 0x07;
1753 w83627ehf_set_temp_reg_ehf(data, 4);
1759 reg = w83627ehf_read_value(data, 0x4a);
1760 data->temp_src[0] = reg >> 5;
1761 reg = w83627ehf_read_value(data, 0x49);
1762 data->temp_src[1] = reg & 0x07;
1763 data->temp_src[2] = (reg >> 4) & 0x07;
1771 reg = w83627ehf_read_value(data, 0x7d);
1773 if (reg != data->temp_src[0] && reg != data->temp_src[1]
1774 && reg != data->temp_src[2]) {
1775 data->temp_src[3] = reg;
1776 data->have_temp |= 1 << 3;
1783 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1784 if (data->temp_src[2] == 2 && (reg & 0x01))
1785 data->have_temp &= ~(1 << 2);
1787 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
1788 || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
1789 data->in6_skip = 1;
1791 data->temp_label = w83667hg_b_temp_label;
1792 data->have_temp_offset = data->have_temp & 0x07;
1794 if (data->temp_src[i] > 2)
1795 data->have_temp_offset &= ~(1 << i);
1800 w83627ehf_set_temp_reg_ehf(data, 3);
1806 data->temp_src[0] = 0; /* SYSTIN */
1807 reg = w83627ehf_read_value(data, 0x49) & 0x07;
1810 data->temp_src[1] = 1;
1812 data->temp_src[1] = reg + 2;
1814 data->have_temp &= ~(1 << 1);
1815 reg = w83627ehf_read_value(data, 0x4a);
1816 data->temp_src[2] = reg >> 5;
1822 if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||
1823 data->temp_src[2] == data->temp_src[0] ||
1824 ((data->have_temp & (1 << 1)) &&
1825 data->temp_src[2] == data->temp_src[1]))
1826 data->have_temp &= ~(1 << 2);
1828 data->temp3_val_only = 1; /* No limit regs */
1830 data->in6_skip = 1; /* No VIN3 */
1832 data->temp_label = w83667hg_b_temp_label;
1833 data->have_temp_offset = data->have_temp & 0x03;
1835 if (data->temp_src[i] > 1)
1836 data->have_temp_offset &= ~(1 << i);
1839 w83627ehf_set_temp_reg_ehf(data, 3);
1850 reg = w83627ehf_read_value(data,
1853 data->have_temp &= ~(1 << 2);
1855 data->in6_skip = 1;
1857 data->have_temp_offset = data->have_temp & 0x07;
1861 data->REG_FAN_MAX_OUTPUT =
1863 data->REG_FAN_STEP_OUTPUT =
1866 data->REG_FAN_MAX_OUTPUT =
1868 data->REG_FAN_STEP_OUTPUT =
1874 data->scale_in = scale_in_w83627uhg;
1876 data->scale_in = scale_in_common;
1879 w83627ehf_init_device(data, sio_data->kind);
1881 data->vrm = vid_which_vrm();
1895 data->vid = superio_inb(sio_data->sioreg, 0xe3);
1896 data->have_vid = true;
1910 if ((en_vrm10 & 0x08) && data->vrm == 90) {
1917 && data->vrm == 100) {
1926 data->vid = superio_inb(sio_data->sioreg,
1929 data->vid &= 0x3f;
1930 data->have_vid = true;
1937 w83627ehf_check_fan_inputs(sio_data, data);
1942 w83627ehf_update_fan_div(data);
1944 /* Read pwm data to save original values */
1945 w83627ehf_update_pwm(data);
1946 for (i = 0; i < data->pwm_num; i++)
1947 data->pwm_enable_orig[i] = data->pwm_enable[i];
1950 data->name,
1951 data,
1969 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1971 release_region(data->addr, IOREGION_LENGTH);
1979 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1981 mutex_lock(&data->update_lock);
1982 data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1983 mutex_unlock(&data->update_lock);
1990 struct w83627ehf_data *data = dev_get_drvdata(dev);
1993 mutex_lock(&data->update_lock);
1994 data->bank = 0xff; /* Force initial bank selection */
1997 for (i = 0; i < data->in_num; i++) {
1998 if ((i == 6) && data->in6_skip)
2001 w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),
2002 data->in_min[i]);
2003 w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),
2004 data->in_max[i]);
2008 if (!(data->has_fan_min & (1 << i)))
2011 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[i],
2012 data->fan_min[i]);
2016 if (!(data->have_temp & (1 << i)))
2019 if (data->reg_temp_over[i])
2020 w83627ehf_write_temp(data, data->reg_temp_over[i],
2021 data->temp_max[i]);
2022 if (data->reg_temp_hyst[i])
2023 w83627ehf_write_temp(data, data->reg_temp_hyst[i],
2024 data->temp_max_hyst[i]);
2027 if (data->have_temp_offset & (1 << i))
2028 w83627ehf_write_value(data,
2030 data->temp_offset[i]);
2034 w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);
2037 data->valid = 0;
2038 mutex_unlock(&data->update_lock);
2190 pr_err("Platform data allocation failed\n");