Lines Matching refs:reg
137 superio_outb(int ioreg, int reg, int val)
139 outb(reg, ioreg);
144 superio_inb(int ioreg, int reg)
146 outb(reg, ioreg);
984 static unsigned int step_time_from_reg(u8 reg, u8 mode)
986 return mode ? 400 * reg : 100 * reg;
995 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
997 if (reg == 0 || reg == 255)
999 return 1350000U / (reg << divreg);
1002 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
1004 if ((reg & 0xff1f) == 0xff1f)
1007 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
1009 if (reg == 0)
1012 return 1350000U / reg;
1015 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
1017 if (reg == 0 || reg == 0xffff)
1024 return 1350000U / (reg << divreg);
1027 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg)
1029 return reg;
1041 div_from_reg(u8 reg)
1043 return BIT(reg);
1055 static inline long in_from_reg(u8 reg, u8 nr)
1057 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
1136 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
1137 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
1356 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1360 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1361 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1362 reg == 0x111 || reg == 0x121 || reg == 0x131;
1364 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1365 reg == 0x26 || reg == 0x28 || reg == 0xe0 || reg == 0xe2 ||
1366 reg == 0xe4 || reg == 0xe6 || reg == 0xe8 || reg == 0x111 ||
1367 reg == 0x121 || reg == 0x131 || reg == 0x191 || reg == 0x1a1;
1369 return (((reg & 0xff00) == 0x100 ||
1370 (reg & 0xff00) == 0x200) &&
1371 ((reg & 0x00ff) == 0x50 ||
1372 (reg & 0x00ff) == 0x53 ||
1373 (reg & 0x00ff) == 0x55)) ||
1374 (reg & 0xfff0) == 0x630 ||
1375 reg == 0x640 || reg == 0x642 ||
1376 reg == 0x662 ||
1377 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1378 reg == 0x73 || reg == 0x75 || reg == 0x77;
1380 return (((reg & 0xff00) == 0x100 ||
1381 (reg & 0xff00) == 0x200) &&
1382 ((reg & 0x00ff) == 0x50 ||
1383 (reg & 0x00ff) == 0x53 ||
1384 (reg & 0x00ff) == 0x55)) ||
1385 (reg & 0xfff0) == 0x630 ||
1386 reg == 0x402 ||
1387 reg == 0x640 || reg == 0x642 ||
1388 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1389 reg == 0x73 || reg == 0x75 || reg == 0x77;
1398 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1399 (reg & 0xfff0) == 0x4c0 ||
1400 reg == 0x402 ||
1401 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1402 reg == 0x640 || reg == 0x642 || reg == 0x64a ||
1403 reg == 0x64c ||
1404 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1405 reg == 0x7b || reg == 0x7d;
1416 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1418 u8 bank = reg >> 8;
1427 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1429 int res, word_sized = is_word_sized(data, reg);
1431 nct6775_set_bank(data, reg);
1432 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1435 outb_p((reg & 0xff) + 1,
1442 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1444 int word_sized = is_word_sized(data, reg);
1446 nct6775_set_bank(data, reg);
1447 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1450 outb_p((reg & 0xff) + 1,
1458 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1462 res = nct6775_read_value(data, reg);
1463 if (!is_word_sized(data, reg))
1469 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1471 if (!is_word_sized(data, reg))
1473 return nct6775_write_value(data, reg, value);
1479 u8 reg;
1483 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1485 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1488 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1490 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1493 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1495 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1498 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1500 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1555 u8 reg;
1566 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1567 if (!reg)
1576 struct nct6775_data *data, int nr, u16 reg)
1589 if (reg == 0x00 && fan_div < 0x07)
1591 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1627 int fanmodecfg, reg;
1669 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1670 data->pwm_temp_sel[i] = reg & 0x1f;
1672 if (reg & 0x80)
1678 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1679 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1681 if (!(reg & 0x80))
1697 u8 reg;
1738 reg = nct6775_read_value(data,
1741 (reg & 0x02) ? 0xff : 0x00;
1756 reg = nct6775_read_value(data,
1758 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1759 reg = nct6775_read_value(data,
1762 reg = 0xff;
1763 data->auto_pwm[i][data->auto_pwm_num] = reg;
1796 u16 reg;
1801 reg = nct6775_read_value(data, data->REG_FAN[i]);
1802 data->rpm[i] = data->fan_from_reg(reg,
1816 nct6775_select_fan_div(dev, data, i, reg);
2128 unsigned int reg;
2157 reg = 1350000U / val;
2158 if (reg >= 128 * 255) {
2168 } else if (!reg) {
2185 while (reg > 192 && new_div < 7) {
2186 reg >>= 1;
2189 data->fan_min[nr] = reg;
2233 u8 reg;
2244 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
2245 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2246 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2247 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2540 u8 reg;
2558 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2559 reg &= ~data->PWM_MODE_MASK[nr];
2561 reg |= data->PWM_MODE_MASK[nr];
2562 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2601 u8 reg;
2612 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2613 reg &= 0x7f;
2615 reg |= 0x80;
2616 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2648 u8 reg;
2655 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2656 reg = (reg & ~data->tolerance_mask) |
2658 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2662 reg = (data->target_speed[nr] >> 8) & 0x0f;
2663 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2666 reg);
2674 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2675 reg = (reg & ~data->tolerance_mask) |
2677 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2700 u16 reg;
2728 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2729 reg &= 0x0f;
2730 reg |= pwm_enable_to_reg(val) << 4;
2731 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2771 int err, reg, src;
2784 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2785 reg &= 0xe0;
2786 reg |= src;
2787 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2813 int err, reg, src;
2829 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2830 reg &= 0xe0;
2831 reg |= (src | 0x80);
2832 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2835 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2836 reg &= 0x7f;
2837 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
3147 u8 reg;
3172 reg = nct6775_read_value(data,
3175 reg |= 0x02;
3177 reg &= ~0x02;
3179 reg);
3195 reg = nct6775_read_value(data,
3198 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3200 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3203 reg);
3415 u8 reg;
3435 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3436 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3437 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3438 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3439 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
4648 u8 reg;
4658 reg = superio_inb(sioreg, SIO_REG_ENABLE);
4659 if (reg != data->sio_reg_enable)