Lines Matching refs:ipu_cm_write
34 static inline void ipu_cm_write(struct ipu_soc *ipu, u32 value, unsigned offset)
53 ipu_cm_write(ipu, val, IPU_SRM_PRI2);
268 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_CUR_BUF(chno));
285 ipu_cm_write(ipu, reg, IPU_CHA_DB_MODE_SEL(channel->num));
384 ipu_cm_write(ipu, val, IPU_DISP_GEN);
388 ipu_cm_write(ipu, val, IPU_CONF);
405 ipu_cm_write(ipu, val, IPU_CONF);
414 ipu_cm_write(ipu, val, IPU_DISP_GEN);
465 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno));
467 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno));
481 ipu_cm_write(ipu, 0xF0300000, IPU_GPR); /* write one to clear */
484 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno));
487 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno));
490 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF2_RDY(chno));
495 ipu_cm_write(ipu, 0x0, IPU_GPR); /* write one to set */
558 ipu_cm_write(ipu, 0xf0000000, IPU_GPR); /* write one to clear */
562 ipu_cm_write(ipu, idma_mask(channel->num),
568 ipu_cm_write(ipu, idma_mask(channel->num),
572 ipu_cm_write(ipu, 0x0, IPU_GPR); /* write one to set */
577 ipu_cm_write(ipu, val, IPU_CHA_DB_MODE_SEL(channel->num));
614 ipu_cm_write(ipu, 0x807FFFFF, IPU_MEM_RST);
645 ipu_cm_write(ipu, val, IPU_CONF);
672 ipu_cm_write(ipu, val, IPU_CONF);
748 ipu_cm_write(ipu, src_reg, link->src.reg);
755 ipu_cm_write(ipu, sink_reg, link->sink.reg);
781 ipu_cm_write(ipu, src_reg, link->src.reg);
787 ipu_cm_write(ipu, sink_reg, link->sink.reg);
1230 ipu_cm_write(ipu, 0, IPU_INT_CTRL(i / 32));
1231 ipu_cm_write(ipu, ~unused[i / 32], IPU_INT_STAT(i / 32));
1428 ipu_cm_write(ipu, 0x00400000L | (IPU_MCU_T_DEFAULT << 18),